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authorTom Rini <[email protected]>2022-07-01 09:14:32 -0400
committerTom Rini <[email protected]>2022-07-01 09:14:32 -0400
commit9fcc2fb3fec3f2f09594747e4c47f3758f79b9df (patch)
treee52f47449f1ea04988b39a5b676084bf673c0077 /include
parent085fea0b65c0aab6962e4e62c0fd376e3c63a90e (diff)
parentef5ba2cef4a08b68caaa9215fcac142d3025bbf7 (diff)
Merge commit 'ef5ba2cef4a08b68caaa9215fcac142d3025bbf7' of https://github.com/tienfong/uboot_mainline
Diffstat (limited to 'include')
-rw-r--r--include/configs/socfpga_chameleonv3.h44
1 files changed, 44 insertions, 0 deletions
diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h
new file mode 100644
index 00000000000..891b762946b
--- /dev/null
+++ b/include/configs/socfpga_chameleonv3.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2022 Google LLC
+ */
+#ifndef __SOCFGPA_CHAMELEONV3_H__
+#define __SOCFGPA_CHAMELEONV3_H__
+
+#include <asm/arch/base_addr_a10.h>
+
+#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024)
+
+/*
+ * U-Boot general configurations
+ */
+
+/* Memory configurations */
+#define PHYS_SDRAM_1_SIZE 0x40000000
+
+/*
+ * Serial / UART configurations
+ */
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "autoload=no\0" \
+ "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \
+ "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \
+ "bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \
+ "bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0"
+
+/*
+ * L4 OSC1 Timer 0
+ */
+/* reload value when timer count to zero */
+#define TIMER_LOAD_VAL 0xFFFFFFFF
+
+/* SPL memory allocation configuration, this is for FAT implementation */
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000
+
+/* The rest of the configuration is shared */
+#include <configs/socfpga_common.h>
+
+#endif /* __SOCFGPA_CHAMELEONV3_H__ */