diff options
| author | Tom Rini <[email protected]> | 2023-01-02 18:07:41 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2023-01-02 18:07:41 -0500 |
| commit | a95410696d21d38b629c61a09c100197c5fc533a (patch) | |
| tree | 2cbf4a1055910d1fdff3ef983015ce2be3c81172 /include | |
| parent | 3aa14d76182dbbaf9fed4deeaf362f083b9d2f5b (diff) | |
| parent | 28663622cf0767d0c5f31629ab50e34069bf0267 (diff) | |
Merge branch '2023-01-02-platform-updates' into next
- Synquacer updates / fixes, PowerPC keymile platform dts fix, assorted
TI platform updates, ht1380 RTC driver, serial driver cleanups,
pg_wcom defconfig updates, s5p4418 DM_SERIAL (and legacy code removal).
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/s5p4418_nanopi2.h | 8 | ||||
| -rw-r--r-- | include/configs/uniphier.h | 3 |
2 files changed, 4 insertions, 7 deletions
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2fa44e65fc1..fec1bfd50eb 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,11 +76,9 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CFG_PL011_CLOCK 50000000 -#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ - (void *)PHY_BASEADDR_UART1, \ - (void *)PHY_BASEADDR_UART2, \ - (void *)PHY_BASEADDR_UART3} + +/* 150MHz is the clock rate set by SPL (uart0) */ +#define CFG_PL011_CLOCK 150000000 /*----------------------------------------------------------------------- * BACKLIGHT diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index ecf0d2ac44a..0a14d0448c6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -36,8 +36,7 @@ BOOT_TARGET_DEVICE_USB(func) #if !defined(CONFIG_ARM64) -/* Time clock 1MHz */ -#define CFG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_HZ_CLOCK 50000000 #endif #define CFG_SYS_NAND_REGS_BASE 0x68100000 |