Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC

29 files changed, 141 insertions, 54 deletions

diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h
index e2f9e76a978..573ff3e4018 100644
--- a/include/configs/bmips_bcm3380.h
+++ b/include/configs/bmips_bcm3380.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM3380_H
 #define __CONFIG_BMIPS_BCM3380_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
 
@@ -13,11 +15,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM3380_H */
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
index 476aa51af30..c7e7119aafd 100644
--- a/include/configs/bmips_bcm6318.h
+++ b/include/configs/bmips_bcm6318.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6318_H
 #define __CONFIG_BMIPS_BCM6318_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM6318_H */
diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h
index 1456b0ec479..45f26bb3097 100644
--- a/include/configs/bmips_bcm63268.h
+++ b/include/configs/bmips_bcm63268.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM63268_H
 #define __CONFIG_BMIPS_BCM63268_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM63268_H */
diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h
index faf9abcc3e4..8d594387853 100644
--- a/include/configs/bmips_bcm6328.h
+++ b/include/configs/bmips_bcm6328.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6328_H
 #define __CONFIG_BMIPS_BCM6328_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM6328_H */
diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index 83050c94a6b..38dd9e3af3a 100644
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6338_H
 #define __CONFIG_BMIPS_BCM6338_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	120000000
 
@@ -13,11 +15,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #define CONFIG_SYS_FLASH_BASE			0xbfc00000
diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index 5eb8b0f9d09..061d6b25b71 100644
--- a/include/configs/bmips_bcm6348.h
+++ b/include/configs/bmips_bcm6348.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6348_H
 #define __CONFIG_BMIPS_BCM6348_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	128000000
 
@@ -18,11 +20,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #define CONFIG_SYS_FLASH_BASE			0xbfc00000
diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h
index 7becf3fcb92..583217d2621 100644
--- a/include/configs/bmips_bcm6358.h
+++ b/include/configs/bmips_bcm6358.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6358_H
 #define __CONFIG_BMIPS_BCM6358_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	150000000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #define CONFIG_SYS_FLASH_BASE			0xbe000000
diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h
index 60777207e1b..570bc3b33d3 100644
--- a/include/configs/bmips_bcm6362.h
+++ b/include/configs/bmips_bcm6362.h
@@ -1,11 +1,13 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
  */
 
 #ifndef __CONFIG_BMIPS_BCM6362_H
 #define __CONFIG_BMIPS_BCM6362_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM6362_H */
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
index 1a57476e055..ab5bdac7268 100644
--- a/include/configs/bmips_bcm6368.h
+++ b/include/configs/bmips_bcm6368.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6368_H
 #define __CONFIG_BMIPS_BCM6368_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	200000000
 
@@ -20,11 +22,11 @@
 #define CONFIG_USB_OHCI_NEW
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #define CONFIG_SYS_FLASH_BASE			0xb8000000
diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h
index d735c51efc8..f1ff05414d5 100644
--- a/include/configs/bmips_bcm6838.h
+++ b/include/configs/bmips_bcm6838.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_BCM6838_H
 #define __CONFIG_BMIPS_BCM6838_H
 
+#include <linux/sizes.h>
+
 /* CPU */
 #define CONFIG_SYS_MIPS_TIMER_FREQ	160000000
 
@@ -13,11 +15,11 @@
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 /* U-Boot */
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + SZ_1M
 
 #if defined(CONFIG_BMIPS_BOOT_RAM)
 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#define CONFIG_SYS_INIT_SP_OFFSET	SZ_8K
 #endif
 
 #endif /* __CONFIG_BMIPS_BCM6838_H */
diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h
index 788f4af70da..3cb2d4050d0 100644
--- a/include/configs/bmips_common.h
+++ b/include/configs/bmips_common.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_BMIPS_COMMON_H
 #define __CONFIG_BMIPS_COMMON_H
 
+#include <linux/sizes.h>
+
 /* ETH */
 #define CONFIG_PHY_RESET_DELAY		20
 #define CONFIG_SYS_RX_ETH_BUFFER	6
@@ -14,15 +16,11 @@
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
 					  230400, 500000, 1500000 }
 
-/* RAM */
-#define CONFIG_SYS_MEMTEST_START	0xa0000000
-#define CONFIG_SYS_MEMTEST_END		0xa2000000
-
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		24
-#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
-#define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
-#define CONFIG_SYS_CBSIZE		512
+#define CONFIG_SYS_MALLOC_LEN		SZ_2M
+#define CONFIG_SYS_BOOTPARAMS_LEN	SZ_128K
+#define CONFIG_SYS_CBSIZE		SZ_512
 
 /* U-Boot */
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h
index aa6ce67d533..b0e93376fe3 100644
--- a/include/configs/broadcom_bcm968380gerg.h
+++ b/include/configs/broadcom_bcm968380gerg.h
@@ -6,7 +6,7 @@
 #include <configs/bmips_common.h>
 #include <configs/bmips_bcm6838.h>
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
+#define CONFIG_ENV_SIZE	SZ_8K
 
 #ifdef CONFIG_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/include/configs/comtrend_ar5315u.h b/include/configs/comtrend_ar5315u.h
index a5eb3aea195..1da96c163a1 100644
--- a/include/configs/comtrend_ar5315u.h
+++ b/include/configs/comtrend_ar5315u.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/comtrend_ar5387un.h b/include/configs/comtrend_ar5387un.h
index 71c5ba45be5..73e6a5dac79 100644
--- a/include/configs/comtrend_ar5387un.h
+++ b/include/configs/comtrend_ar5387un.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/comtrend_ct5361.h b/include/configs/comtrend_ct5361.h
index da705923066..72f9ecbb06f 100644
--- a/include/configs/comtrend_ct5361.h
+++ b/include/configs/comtrend_ct5361.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h
index e183288c5d1..cb888056bcf 100644
--- a/include/configs/comtrend_vr3032u.h
+++ b/include/configs/comtrend_vr3032u.h
@@ -8,5 +8,10 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
+#define CONFIG_ENV_SIZE	SZ_8K
 
+#ifdef CONFIG_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#endif /* CONFIG_NAND */
diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h
index 7070a1c757f..b67f6548e68 100644
--- a/include/configs/comtrend_wap5813n.h
+++ b/include/configs/comtrend_wap5813n.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index b3b89d2ab9e..e83a96ad5e1 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -22,7 +22,7 @@
 
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
-					  230400, 500000, 1500000 }
+					  230400, 460800, 921600 }
 
 /* RAM */
 #define CONFIG_SYS_MEMTEST_START	0x80100000
diff --git a/include/configs/huawei_hg556a.h b/include/configs/huawei_hg556a.h
index 1c9bee6d58d..2aa5c666432 100644
--- a/include/configs/huawei_hg556a.h
+++ b/include/configs/huawei_hg556a.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index 2adf38545a0..4d30d98abfa 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -22,7 +22,7 @@
 
 /* UART */
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, \
-					  230400, 500000, 1500000 }
+					  230400, 460800, 921600 }
 
 /* RAM */
 #define CONFIG_SYS_MEMTEST_START	0x80100000
diff --git a/include/configs/netgear_cg3100d.h b/include/configs/netgear_cg3100d.h
index d541e9cee83..e5a96015197 100644
--- a/include/configs/netgear_cg3100d.h
+++ b/include/configs/netgear_cg3100d.h
@@ -6,5 +6,4 @@
 #include <configs/bmips_common.h>
 #include <configs/bmips_bcm3380.h>
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/netgear_dgnd3700v2.h b/include/configs/netgear_dgnd3700v2.h
index 9edaec9bff5..3baa17ae618 100644
--- a/include/configs/netgear_dgnd3700v2.h
+++ b/include/configs/netgear_dgnd3700v2.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
  */
 
 #include <configs/bmips_common.h>
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/[email protected] b/include/configs/[email protected]
index 7171dc6760d..5a526d9d8b3 100644
--- a/include/configs/[email protected]
+++ b/include/configs/[email protected]
@@ -6,5 +6,4 @@
 #include <configs/bmips_common.h>
 #include <configs/bmips_bcm6338.h>
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/configs/sfr_nb4_ser.h b/include/configs/sfr_nb4_ser.h
index 1c9bee6d58d..2aa5c666432 100644
--- a/include/configs/sfr_nb4_ser.h
+++ b/include/configs/sfr_nb4_ser.h
@@ -8,5 +8,4 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
+#define CONFIG_ENV_SIZE	SZ_8K
diff --git a/include/dt-bindings/clock/bcm6362-clock.h b/include/dt-bindings/clock/bcm6362-clock.h
index fed04e6b5f0..d3770c50490 100644
--- a/include/dt-bindings/clock/bcm6362-clock.h
+++ b/include/dt-bindings/clock/bcm6362-clock.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
  *
  * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  */
diff --git a/include/dt-bindings/clock/mt7628-clk.h b/include/dt-bindings/clock/mt7628-clk.h
new file mode 100644
index 00000000000..b5866fdc0e3
--- /dev/null
+++ b/include/dt-bindings/clock/mt7628-clk.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ *
+ * Author:  Weijie Gao <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_MT7628_CLK_H_
+#define _DT_BINDINGS_MT7628_CLK_H_
+
+/* Base clocks */
+#define CLK_SYS				34
+#define CLK_CPU				33
+#define CLK_XTAL			32
+
+/* Peripheral clocks */
+#define CLK_PWM				31
+#define CLK_SDXC			30
+#define CLK_CRYPTO			29
+#define CLK_MIPS_CNT			28
+#define CLK_PCIE			26
+#define CLK_UPHY			25
+#define CLK_ETH				23
+#define CLK_UART2			20
+#define CLK_UART1			19
+#define CLK_SPI				18
+#define CLK_I2S				17
+#define CLK_I2C				16
+#define CLK_GDMA			14
+#define CLK_PIO				13
+#define CLK_UART0			12
+#define CLK_PCM				11
+#define CLK_MC				10
+#define CLK_INTC			9
+#define CLK_TIMER			8
+
+#endif /* _DT_BINDINGS_MT7628_CLK_H_ */
diff --git a/include/dt-bindings/power-domain/bcm6362-power-domain.h b/include/dt-bindings/power-domain/bcm6362-power-domain.h
index ddc123ea886..1a708a9ad23 100644
--- a/include/dt-bindings/power-domain/bcm6362-power-domain.h
+++ b/include/dt-bindings/power-domain/bcm6362-power-domain.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
  */
 
 #ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6362_H
diff --git a/include/dt-bindings/reset/bcm6362-reset.h b/include/dt-bindings/reset/bcm6362-reset.h
index 6e257ce78f2..8202e499190 100644
--- a/include/dt-bindings/reset/bcm6362-reset.h
+++ b/include/dt-bindings/reset/bcm6362-reset.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
+ * Copyright (C) 2018 Álvaro Fernández Rojas <[email protected]>
  *
  * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  */
diff --git a/include/dt-bindings/reset/mt7628-reset.h b/include/dt-bindings/reset/mt7628-reset.h
new file mode 100644
index 00000000000..2a674c1ea72
--- /dev/null
+++ b/include/dt-bindings/reset/mt7628-reset.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ *
+ * Author:  Weijie Gao <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_MT7628_RESET_H_
+#define _DT_BINDINGS_MT7628_RESET_H_
+
+#define MT7628_PWM_RST			31
+#define MT7628_SDXC_RST			30
+#define MT7628_CRYPTO_RST		29
+#define MT7628_AUX_STCK_RST		28
+#define MT7628_PCIE_RST			26
+#define MT7628_EPHY_RST			24
+#define MT7628_ETH_RST			23
+#define MT7628_UPHY_RST			22
+#define MT7628_UART2_RST		20
+#define MT7628_UART1_RST		19
+#define MT7628_SPI_RST			18
+#define MT7628_I2S_RST			17
+#define MT7628_I2C_RST			16
+#define MT7628_GDMA_RST			14
+#define MT7628_PIO_RST			13
+#define MT7628_UART0_RST		12
+#define MT7628_PCM_RST			11
+#define MT7628_MC_RST			10
+#define MT7628_INT_RST			9
+#define MT7628_TIMER_RST		8
+#define MT7628_HIF_RST			5
+#define MT7628_WIFI_RST			4
+#define MT7628_SPIS_RST			3
+#define MT7628_SYS_RST			0
+
+#endif /* _DT_BINDINGS_MT7628_RESET_H_ */