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-rw-r--r--arch/x86/Kconfig20
-rw-r--r--arch/x86/cpu/apollolake/cpu.c4
-rw-r--r--arch/x86/cpu/apollolake/cpu_spl.c2
-rw-r--r--arch/x86/cpu/apollolake/hostbridge.c2
-rw-r--r--arch/x86/cpu/apollolake/lpc.c2
-rw-r--r--arch/x86/cpu/coreboot/sdram.c4
-rw-r--r--arch/x86/cpu/efi/payload.c4
-rw-r--r--arch/x86/cpu/efi/sdram.c4
-rw-r--r--arch/x86/cpu/intel_common/generic_wifi.c2
-rw-r--r--arch/x86/cpu/intel_common/mrc.c4
-rw-r--r--arch/x86/cpu/ivybridge/sdram_nop.c4
-rw-r--r--arch/x86/cpu/qemu/dram.c8
-rw-r--r--arch/x86/cpu/quark/dram.c4
-rw-r--r--arch/x86/cpu/slimbootloader/sdram.c4
-rw-r--r--arch/x86/cpu/tangier/sdram.c4
-rw-r--r--arch/x86/lib/bootm.c5
-rw-r--r--arch/x86/lib/fsp/fsp_dram.c18
-rw-r--r--arch/x86/lib/fsp/fsp_graphics.c2
18 files changed, 47 insertions, 50 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 8f21b78dbe4..ec4d484a669 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -44,9 +44,9 @@ config X86_RUN_64BIT_NO_SPL
bool "64-bit"
select X86_64
help
- Build U-Boot as a 64-bit binary without SPL. As U-Boot enters
- in 64-bit mode, the assumption is that the silicon is fully
- initialized (MP, page tables, etc.).
+ Build U-Boot as a 64-bit binary without SPL. As U-Boot enters
+ in 64-bit mode, the assumption is that the silicon is fully
+ initialized (MP, page tables, etc.).
endchoice
@@ -585,11 +585,11 @@ config DCACHE_RAM_MRC_VAR_SIZE
not boot.
config HAVE_REFCODE
- bool "Add a Reference Code binary"
- help
- Select this option to add a Reference Code binary to the resulting
- U-Boot image. This is an Intel binary blob that handles system
- initialisation, in this case the PCH and System Agent.
+ bool "Add a Reference Code binary"
+ help
+ Select this option to add a Reference Code binary to the resulting
+ U-Boot image. This is an Intel binary blob that handles system
+ initialisation, in this case the PCH and System Agent.
Note: Without this binary (on platforms that need it such as
broadwell) U-Boot will be missing some critical setup steps.
@@ -617,8 +617,8 @@ config SMP_AP_WORK
bool
depends on SMP
help
- Allow APs to do other work after initialisation instead of going
- to sleep.
+ Allow APs to do other work after initialisation instead of going
+ to sleep.
config MAX_CPUS
int "Maximum number of CPUs permitted"
diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c
index f480bb1d8c3..d1f592ec57e 100644
--- a/arch/x86/cpu/apollolake/cpu.c
+++ b/arch/x86/cpu/apollolake/cpu.c
@@ -171,11 +171,9 @@ static int cpu_apl_probe(struct udevice *dev)
return 0;
}
-#ifdef CONFIG_ACPIGEN
-struct acpi_ops apl_cpu_acpi_ops = {
+static const struct acpi_ops __maybe_unused apl_cpu_acpi_ops = {
.fill_ssdt = acpi_cpu_fill_ssdt,
};
-#endif
static const struct cpu_ops cpu_x86_apl_ops = {
.get_desc = cpu_x86_get_desc,
diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c
index 8198667fa50..080c5a58575 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -6,7 +6,7 @@
*/
#include <dm.h>
-#include <ec_commands.h>
+#include <cros_ec.h>
#include <init.h>
#include <log.h>
#include <spi_flash.h>
diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c
index 284f16cfd91..360d091121c 100644
--- a/arch/x86/cpu/apollolake/hostbridge.c
+++ b/arch/x86/cpu/apollolake/hostbridge.c
@@ -366,7 +366,7 @@ ulong sa_get_tseg_base(struct udevice *dev)
return sa_read_reg(dev, TSEG);
}
-struct acpi_ops apl_hostbridge_acpi_ops = {
+static const struct acpi_ops __maybe_unused apl_hostbridge_acpi_ops = {
.get_name = apl_acpi_hb_get_name,
#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE)
.write_tables = apl_acpi_hb_write_tables,
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index f34c199bf73..008c4dc0037 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -119,7 +119,7 @@ static int apl_acpi_lpc_get_name(const struct udevice *dev, char *out_name)
return acpi_copy_name(out_name, "LPCB");
}
-struct acpi_ops apl_lpc_acpi_ops = {
+static const struct acpi_ops __maybe_unused apl_lpc_acpi_ops = {
.get_name = apl_acpi_lpc_get_name,
#ifdef CONFIG_GENERATE_ACPI_TABLE
.write_tables = intel_southbridge_write_acpi_tables,
diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c
index cc1edd7badd..81604ee12fb 100644
--- a/arch/x86/cpu/coreboot/sdram.c
+++ b/arch/x86/cpu/coreboot/sdram.c
@@ -91,8 +91,8 @@ int dram_init_banksize(void)
struct memrange *memrange = &lib_sysinfo.memrange[i];
if (memrange->type == CB_MEM_RAM) {
- gd->bd->bi_dram[j].start = memrange->base;
- gd->bd->bi_dram[j].size = memrange->size;
+ gd->dram[j].start = memrange->base;
+ gd->dram[j].size = memrange->size;
j++;
if (j >= CONFIG_NR_DRAM_BANKS)
break;
diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c
index 6845ce72ff9..b86d50b2cab 100644
--- a/arch/x86/cpu/efi/payload.c
+++ b/arch/x86/cpu/efi/payload.c
@@ -123,8 +123,8 @@ int dram_init_banksize(void)
if (desc->type != EFI_CONVENTIONAL_MEMORY ||
(desc->num_pages << EFI_PAGE_SHIFT) < 1 << 20)
continue;
- gd->bd->bi_dram[num_banks].start = desc->physical_start;
- gd->bd->bi_dram[num_banks].size = desc->num_pages <<
+ gd->dram[num_banks].start = desc->physical_start;
+ gd->dram[num_banks].size = desc->num_pages <<
EFI_PAGE_SHIFT;
num_banks++;
}
diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c
index 6fe40071140..e09fce8bb1b 100644
--- a/arch/x86/cpu/efi/sdram.c
+++ b/arch/x86/cpu/efi/sdram.c
@@ -24,8 +24,8 @@ int dram_init(void)
int dram_init_banksize(void)
{
- gd->bd->bi_dram[0].start = efi_get_ram_base();
- gd->bd->bi_dram[0].size = CONFIG_EFI_RAM_SIZE;
+ gd->dram[0].start = efi_get_ram_base();
+ gd->dram[0].size = CONFIG_EFI_RAM_SIZE;
return 0;
}
diff --git a/arch/x86/cpu/intel_common/generic_wifi.c b/arch/x86/cpu/intel_common/generic_wifi.c
index 75fa4e01d8a..1a24c10ab0b 100644
--- a/arch/x86/cpu/intel_common/generic_wifi.c
+++ b/arch/x86/cpu/intel_common/generic_wifi.c
@@ -102,7 +102,7 @@ static int intel_wifi_acpi_fill_ssdt(const struct udevice *dev,
return 0;
}
-struct acpi_ops wifi_acpi_ops = {
+static const struct acpi_ops wifi_acpi_ops = {
.fill_ssdt = intel_wifi_acpi_fill_ssdt,
};
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index baa1f0e32d6..11ce97b5143 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -67,8 +67,8 @@ void mrc_common_dram_init_banksize(void)
if (area->start >= 1ULL << 32)
continue;
- gd->bd->bi_dram[num_banks].start = area->start;
- gd->bd->bi_dram[num_banks].size = area->size;
+ gd->dram[num_banks].start = area->start;
+ gd->dram[num_banks].size = area->size;
num_banks++;
}
}
diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c
index d20c9a2a379..a5e81dfada5 100644
--- a/arch/x86/cpu/ivybridge/sdram_nop.c
+++ b/arch/x86/cpu/ivybridge/sdram_nop.c
@@ -11,8 +11,8 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = 1ULL << 31;
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = gd->ram_size;
+ gd->dram[0].start = 0;
+ gd->dram[0].size = gd->ram_size;
return 0;
}
diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c
index ba3638e6acc..3cba04f2c3e 100644
--- a/arch/x86/cpu/qemu/dram.c
+++ b/arch/x86/cpu/qemu/dram.c
@@ -69,13 +69,13 @@ int dram_init_banksize(void)
{
u64 high_mem_size;
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = qemu_get_low_memory_size();
+ gd->dram[0].start = 0;
+ gd->dram[0].size = qemu_get_low_memory_size();
high_mem_size = qemu_get_high_memory_size();
if (high_mem_size) {
- gd->bd->bi_dram[1].start = SZ_4G;
- gd->bd->bi_dram[1].size = high_mem_size;
+ gd->dram[1].start = SZ_4G;
+ gd->dram[1].size = high_mem_size;
}
return 0;
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 34e576940d4..34fdb7e026a 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -169,8 +169,8 @@ int dram_init(void)
int dram_init_banksize(void)
{
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = gd->ram_size;
+ gd->dram[0].start = 0;
+ gd->dram[0].size = gd->ram_size;
return 0;
}
diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c
index 75ca5273625..5aa4f6d3e07 100644
--- a/arch/x86/cpu/slimbootloader/sdram.c
+++ b/arch/x86/cpu/slimbootloader/sdram.c
@@ -129,8 +129,8 @@ int dram_init_banksize(void)
return 0;
/* simply use a single bank to have whole size for now */
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = gd->ram_size;
+ gd->dram[0].start = 0;
+ gd->dram[0].size = gd->ram_size;
return 0;
}
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index 6192f2296b8..6ce96b0569b 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -160,8 +160,8 @@ static int sfi_get_bank_size(void)
if (mentry->type != SFI_MEM_CONV)
continue;
- gd->bd->bi_dram[bank].start = mentry->phys_start;
- gd->bd->bi_dram[bank].size = mentry->pages << 12;
+ gd->dram[bank].start = mentry->phys_start;
+ gd->dram[bank].size = mentry->pages << 12;
bank++;
}
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index cde4fbf3557..e054f42fa86 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -43,14 +43,13 @@ void bootm_announce_and_cleanup(void)
#if defined(CONFIG_OF_LIBFDT) && !defined(CONFIG_OF_NO_KERNEL)
int arch_fixup_memory_node(void *blob)
{
- struct bd_info *bd = gd->bd;
int bank;
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- start[bank] = bd->bi_dram[bank].start;
- size[bank] = bd->bi_dram[bank].size;
+ start[bank] = gd->dram[bank].start;
+ size[bank] = gd->dram[bank].size;
}
return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 730721dc176..a45e4060ef2 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -64,8 +64,8 @@ int dram_init_banksize(void)
update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2);
if (!ll_boot_init()) {
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = gd->ram_size;
+ gd->dram[0].start = 0;
+ gd->dram[0].size = gd->ram_size;
if (update_mtrr)
mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size);
@@ -89,21 +89,21 @@ int dram_init_banksize(void)
mtrr_top = max(mtrr_top,
res_desc->phys_start + res_desc->len);
} else {
- gd->bd->bi_dram[bank].start = res_desc->phys_start;
- gd->bd->bi_dram[bank].size = res_desc->len;
+ gd->dram[bank].start = res_desc->phys_start;
+ gd->dram[bank].size = res_desc->len;
if (update_mtrr)
mtrr_add_request(MTRR_TYPE_WRBACK,
res_desc->phys_start,
res_desc->len);
log_debug("ram %llx %llx\n",
- gd->bd->bi_dram[bank].start,
- gd->bd->bi_dram[bank].size);
+ gd->dram[bank].start,
+ gd->dram[bank].size);
}
}
/* Add the memory below 4GB */
- gd->bd->bi_dram[0].start = 0;
- gd->bd->bi_dram[0].size = low_end;
+ gd->dram[0].start = 0;
+ gd->dram[0].size = low_end;
/*
* Set up an MTRR to the top of low, reserved memory. This is necessary
@@ -184,7 +184,7 @@ unsigned int install_e820_map(unsigned int max_entries,
#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB)
int handoff_arch_save(struct spl_handoff *ho)
{
- ho->arch.usable_ram_top = gd->bd->bi_dram[0].size;
+ ho->arch.usable_ram_top = gd->dram[0].size;
ho->arch.hob_list = gd->arch.hob_list;
return 0;
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index ad25020086c..d425e80760b 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -150,7 +150,7 @@ static int fsp_video_acpi_write_tables(const struct udevice *dev,
}
#endif
-struct acpi_ops fsp_video_acpi_ops = {
+static const struct acpi_ops __maybe_unused fsp_video_acpi_ops = {
#ifdef CONFIG_INTEL_GMA_ACPI
.write_tables = fsp_video_acpi_write_tables,
#endif
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-10 18:58:25 +0000