diff options
Diffstat (limited to 'board/phytec')
| -rw-r--r-- | board/phytec/common/Kconfig | 18 | ||||
| -rw-r--r-- | board/phytec/common/k3/Kconfig | 4 | ||||
| -rw-r--r-- | board/phytec/phycore_am62ax/Kconfig | 4 | ||||
| -rw-r--r-- | board/phytec/phycore_am62ax/phycore-am62ax.c | 6 | ||||
| -rw-r--r-- | board/phytec/phycore_am62x/Kconfig | 40 | ||||
| -rw-r--r-- | board/phytec/phycore_am62x/phycore-am62x.c | 32 | ||||
| -rw-r--r-- | board/phytec/phycore_am62x/tifs-rm-cfg.yaml | 867 | ||||
| -rw-r--r-- | board/phytec/phycore_am64x/Kconfig | 34 | ||||
| -rw-r--r-- | board/phytec/phycore_am64x/phycore-am64x.c | 18 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/Kconfig | 4 | ||||
| -rw-r--r-- | board/phytec/phycore_am68x/rm-cfg.yaml | 14 |
11 files changed, 960 insertions, 81 deletions
diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig index 6afd03086f7..87fa70632e5 100644 --- a/board/phytec/common/Kconfig +++ b/board/phytec/common/Kconfig @@ -2,14 +2,14 @@ config PHYTEC_SOM_DETECTION bool "Support SoM detection for PHYTEC platforms" select SPL_CRC8 if SPL help - Support of I2C EEPROM based SoM detection. + Support of I2C EEPROM based SoM detection. config PHYTEC_SOM_DETECTION_BLOCKS bool "Extend SoM detection with block support" depends on PHYTEC_SOM_DETECTION help - Extend the I2C EEPROM based SoM detection with API v3. This API - introduces blocks with different payloads. + Extend the I2C EEPROM based SoM detection with API v3. This API + introduces blocks with different payloads. config PHYTEC_IMX8M_SOM_DETECTION bool "Support SoM detection for i.MX8M PHYTEC platforms" @@ -35,8 +35,8 @@ config PHYTEC_AM62_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM62x boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM62x boards. config PHYTEC_AM62A_SOM_DETECTION bool "Support SoM detection for AM62Ax PHYTEC platforms" @@ -46,8 +46,8 @@ config PHYTEC_AM62A_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM62Ax boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM62Ax boards. config PHYTEC_AM64_SOM_DETECTION bool "Support SoM detection for AM64x PHYTEC platforms" @@ -57,8 +57,8 @@ config PHYTEC_AM64_SOM_DETECTION depends on SPL_I2C && DM_I2C default y help - Support of I2C EEPROM based SoM detection. Supported - for PHYTEC AM64x boards. + Support of I2C EEPROM based SoM detection. Supported + for PHYTEC AM64x boards. config PHYTEC_EEPROM_BUS int "Board EEPROM's I2C bus number" diff --git a/board/phytec/common/k3/Kconfig b/board/phytec/common/k3/Kconfig index 282f4b79742..4bbe1a5ec3c 100644 --- a/board/phytec/common/k3/Kconfig +++ b/board/phytec/common/k3/Kconfig @@ -1,5 +1,5 @@ config PHYTEC_K3_DDR_PATCH bool "Patch DDR timings on PHYTEC K3 SoMs" help - Allow to override default DDR timings prior to - DDRSS driver probing. + Allow to override default DDR timings prior to + DDRSS driver probing. diff --git a/board/phytec/phycore_am62ax/Kconfig b/board/phytec/phycore_am62ax/Kconfig index 516dc8e2020..e7943c51dbc 100644 --- a/board/phytec/phycore_am62ax/Kconfig +++ b/board/phytec/phycore_am62ax/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am62ax" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62ax" @@ -24,7 +24,7 @@ config SYS_BOARD default "phycore_am62ax" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62ax" diff --git a/board/phytec/phycore_am62ax/phycore-am62ax.c b/board/phytec/phycore_am62ax/phycore-am62ax.c index 3e1c4102cc1..b22ffe9072f 100644 --- a/board/phytec/phycore_am62ax/phycore-am62ax.c +++ b/board/phytec/phycore_am62ax/phycore-am62ax.c @@ -8,6 +8,7 @@ #include <asm/io.h> #include <spl.h> #include <fdt_support.h> +#include <image.h> #include "../common/am6_som_detection.h" @@ -57,3 +58,8 @@ void spl_board_init(void) dram_init_banksize(); } #endif + +int board_fit_config_name_match(const char *name) +{ + return k3_fit_config_match_security_state(name); +} diff --git a/board/phytec/phycore_am62x/Kconfig b/board/phytec/phycore_am62x/Kconfig index ecee5873c0c..feacc3d6d40 100644 --- a/board/phytec/phycore_am62x/Kconfig +++ b/board/phytec/phycore_am62x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am62x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62x" @@ -24,7 +24,7 @@ config SYS_BOARD default "phycore_am62x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am62x" @@ -38,31 +38,31 @@ source "board/phytec/common/k3/Kconfig" endif config PHYCORE_AM62X_RAM_SIZE_FIX - bool "Set phyCORE-AM62x RAM size fix instead of detecting" - default false - help - RAM size is automatic being detected with the help of - the EEPROM introspection data. Set RAM size to a fix value - instead. + bool "Set phyCORE-AM62x RAM size fix instead of detecting" + default false + help + RAM size is automatic being detected with the help of + the EEPROM introspection data. Set RAM size to a fix value + instead. choice - prompt "phyCORE-AM62x RAM size" - depends on PHYCORE_AM62X_RAM_SIZE_FIX - default PHYCORE_AM62X_RAM_SIZE_2GB + prompt "phyCORE-AM62x RAM size" + depends on PHYCORE_AM62X_RAM_SIZE_FIX + default PHYCORE_AM62X_RAM_SIZE_2GB config PHYCORE_AM62X_RAM_SIZE_1GB - bool "1GB RAM" - help - Set RAM size fix to 1GB for phyCORE-AM62x. + bool "1GB RAM" + help + Set RAM size fix to 1GB for phyCORE-AM62x. config PHYCORE_AM62X_RAM_SIZE_2GB - bool "2GB RAM" - help - Set RAM size fix to 2GB for phyCORE-AM62x. + bool "2GB RAM" + help + Set RAM size fix to 2GB for phyCORE-AM62x. config PHYCORE_AM62X_RAM_SIZE_4GB - bool "4GB RAM" - help - Set RAM size fix to 4GB for phyCORE-AM62x. + bool "4GB RAM" + help + Set RAM size fix to 4GB for phyCORE-AM62x. endchoice diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c index 3cdcbf2ecc9..376379767cf 100644 --- a/board/phytec/phycore_am62x/phycore-am62x.c +++ b/board/phytec/phycore_am62x/phycore-am62x.c @@ -9,6 +9,7 @@ #include <spl.h> #include <asm/arch/k3-ddr.h> #include <fdt_support.h> +#include <image.h> #include "phycore-ddr-data.h" #include "../common/k3/k3_ddrss_patch.h" @@ -93,7 +94,7 @@ int dram_init_banksize(void) { u8 ram_size; - memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]) * CONFIG_NR_DRAM_BANKS); + memset(gd->dram, 0, sizeof(gd->dram[0]) * CONFIG_NR_DRAM_BANKS); if (!IS_ENABLED(CONFIG_CPU_V7R)) return fdtdec_setup_memory_banksize(); @@ -101,34 +102,34 @@ int dram_init_banksize(void) ram_size = phytec_get_am62_ddr_size_default(); switch (ram_size) { case EEPROM_RAM_SIZE_1GB: - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x40000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x40000000; gd->ram_size = 0x40000000; break; case EEPROM_RAM_SIZE_2GB: - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x80000000; gd->ram_size = 0x80000000; break; case EEPROM_RAM_SIZE_4GB: /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x80000000; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR upper region */ - gd->bd->bi_dram[1].start = 0x880000000; - gd->bd->bi_dram[1].size = 0x80000000; + gd->dram[1].start = 0x880000000; + gd->dram[1].size = 0x80000000; gd->ram_size = 0x100000000; #endif break; default: /* Continue with default 2GB setup */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x80000000; gd->ram_size = 0x80000000; printf("DDR size %d is not supported\n", ram_size); } @@ -186,8 +187,8 @@ int do_board_detect(void) dram_init_banksize(); for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - start[bank] = gd->bd->bi_dram[bank].start; - size[bank] = gd->bd->bi_dram[bank].size; + start[bank] = gd->dram[bank].start; + size[bank] = gd->dram[bank].size; } ret = fdt_fixup_memory_banks(fdt, start, size, CONFIG_NR_DRAM_BANKS); @@ -237,3 +238,8 @@ void spl_board_init(void) MCU_CTRL_DEVICE_CLKOUT_32K_CTRL); } #endif + +int board_fit_config_name_match(const char *name) +{ + return k3_fit_config_match_security_state(name); +} diff --git a/board/phytec/phycore_am62x/tifs-rm-cfg.yaml b/board/phytec/phycore_am62x/tifs-rm-cfg.yaml new file mode 100644 index 00000000000..8510fe9526e --- /dev/null +++ b/board/phytec/phycore_am62x/tifs-rm-cfg.yaml @@ -0,0 +1,867 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022-2026 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for AM62X +# + +--- + +tifs-rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - # 1 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 2 + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 3 + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - # 4 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 5 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 6 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 10 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 15 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 16 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 17 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 18 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 19 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 20 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 21 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 22 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 23 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 24 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 25 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 26 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 27 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 28 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 29 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 30 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 31 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - # 32 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + resasg: + subhdr: + magic: 0x7B25 + size: 8 + resasg_entries_size: 824 + reserved: 0 + resasg_entries: + - + start_resource: 0 + num_resource: 18 + type: 1677 + host_id: 12 + reserved: 0 + - + start_resource: 18 + num_resource: 6 + type: 1677 + host_id: 35 + reserved: 0 + - + start_resource: 18 + num_resource: 6 + type: 1677 + host_id: 36 + reserved: 0 + - + start_resource: 24 + num_resource: 2 + type: 1677 + host_id: 30 + reserved: 0 + - + start_resource: 26 + num_resource: 6 + type: 1677 + host_id: 128 + reserved: 0 + - + start_resource: 54 + num_resource: 18 + type: 1678 + host_id: 12 + reserved: 0 + - + start_resource: 72 + num_resource: 6 + type: 1678 + host_id: 35 + reserved: 0 + - + start_resource: 72 + num_resource: 6 + type: 1678 + host_id: 36 + reserved: 0 + - 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+ start_resource: 142 + num_resource: 8 + type: 1946 + host_id: 12 + reserved: 0 + - + start_resource: 142 + num_resource: 8 + type: 1947 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1955 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1955 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1955 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1955 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1955 + host_id: 128 + reserved: 0 + - + start_resource: 19 + num_resource: 8 + type: 1956 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 8 + type: 1956 + host_id: 36 + reserved: 0 + - + start_resource: 27 + num_resource: 1 + type: 1957 + host_id: 12 + reserved: 0 + - + start_resource: 28 + num_resource: 1 + type: 1958 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1961 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1961 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1961 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1961 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1961 + host_id: 128 + reserved: 0 + - + start_resource: 0 + num_resource: 10 + type: 1962 + host_id: 12 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1962 + host_id: 35 + reserved: 0 + - + start_resource: 10 + num_resource: 3 + type: 1962 + host_id: 36 + reserved: 0 + - + start_resource: 13 + num_resource: 3 + type: 1962 + host_id: 30 + reserved: 0 + - + start_resource: 16 + num_resource: 3 + type: 1962 + host_id: 128 + reserved: 0 + - + start_resource: 19 + num_resource: 1 + type: 1963 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 1 + type: 1963 + host_id: 36 + reserved: 0 + - + start_resource: 19 + num_resource: 16 + type: 1964 + host_id: 12 + reserved: 0 + - + start_resource: 19 + num_resource: 16 + type: 1964 + host_id: 36 + reserved: 0 + - + start_resource: 20 + num_resource: 1 + type: 1965 + host_id: 12 + reserved: 0 + - + start_resource: 35 + num_resource: 8 + type: 1966 + host_id: 12 + reserved: 0 + - + start_resource: 21 + num_resource: 1 + type: 1967 + host_id: 12 + reserved: 0 + - + start_resource: 35 + num_resource: 8 + type: 1968 + host_id: 12 + reserved: 0 + - + start_resource: 22 + num_resource: 1 + type: 1969 + host_id: 12 + reserved: 0 + - + start_resource: 43 + num_resource: 8 + type: 1970 + host_id: 12 + reserved: 0 + - + start_resource: 23 + num_resource: 1 + type: 1971 + host_id: 12 + reserved: 0 + - + start_resource: 43 + num_resource: 8 + type: 1972 + host_id: 12 + reserved: 0 + - + start_resource: 0 + num_resource: 1 + type: 2112 + host_id: 128 + reserved: 0 + - + start_resource: 2 + num_resource: 2 + type: 2122 + host_id: 12 + reserved: 0 diff --git a/board/phytec/phycore_am64x/Kconfig b/board/phytec/phycore_am64x/Kconfig index a709b71ba4d..a4d25b84b96 100644 --- a/board/phytec/phycore_am64x/Kconfig +++ b/board/phytec/phycore_am64x/Kconfig @@ -12,7 +12,7 @@ config SYS_BOARD default "phycore_am64x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am64x" @@ -27,7 +27,7 @@ config SYS_BOARD default "phycore_am64x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am64x" @@ -37,26 +37,26 @@ source "board/phytec/common/Kconfig" endif config PHYCORE_AM64X_RAM_SIZE_FIX - bool "Set phyCORE-AM64x RAM size fix instead of detecting" - default false - help - RAM size is automatic being detected with the help of - the EEPROM introspection data. Set RAM size to a fix value - instead. + bool "Set phyCORE-AM64x RAM size fix instead of detecting" + default false + help + RAM size is automatic being detected with the help of + the EEPROM introspection data. Set RAM size to a fix value + instead. choice - prompt "phyCORE-AM64x RAM size" - depends on PHYCORE_AM64X_RAM_SIZE_FIX - default PHYCORE_AM64X_RAM_SIZE_2GB + prompt "phyCORE-AM64x RAM size" + depends on PHYCORE_AM64X_RAM_SIZE_FIX + default PHYCORE_AM64X_RAM_SIZE_2GB config PHYCORE_AM64X_RAM_SIZE_1GB - bool "1GB RAM" - help - Set RAM size fix to 1GB for phyCORE-AM64x. + bool "1GB RAM" + help + Set RAM size fix to 1GB for phyCORE-AM64x. config PHYCORE_AM64X_RAM_SIZE_2GB - bool "2GB RAM" - help - Set RAM size fix to 2GB for phyCORE-AM64x. + bool "2GB RAM" + help + Set RAM size fix to 2GB for phyCORE-AM64x. endchoice diff --git a/board/phytec/phycore_am64x/phycore-am64x.c b/board/phytec/phycore_am64x/phycore-am64x.c index 114aa217023..5e077872152 100644 --- a/board/phytec/phycore_am64x/phycore-am64x.c +++ b/board/phytec/phycore_am64x/phycore-am64x.c @@ -66,7 +66,7 @@ int dram_init_banksize(void) { u8 ram_size; - memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]) * CONFIG_NR_DRAM_BANKS); + memset(gd->dram, 0, sizeof(gd->dram[0]) * CONFIG_NR_DRAM_BANKS); if (!IS_ENABLED(CONFIG_CPU_V7R)) return fdtdec_setup_memory_banksize(); @@ -74,21 +74,21 @@ int dram_init_banksize(void) ram_size = phytec_get_am64_ddr_size_default(); switch (ram_size) { case EEPROM_RAM_SIZE_1GB: - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x40000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x40000000; gd->ram_size = 0x40000000; break; case EEPROM_RAM_SIZE_2GB: - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x80000000; gd->ram_size = 0x80000000; break; default: /* Continue with default 2GB setup */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x80000000; + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = 0x80000000; gd->ram_size = 0x80000000; printf("DDR size %d is not supported\n", ram_size); } @@ -109,8 +109,8 @@ int do_board_detect(void) dram_init_banksize(); for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - start[bank] = gd->bd->bi_dram[bank].start; - size[bank] = gd->bd->bi_dram[bank].size; + start[bank] = gd->dram[bank].start; + size[bank] = gd->dram[bank].size; } return fdt_fixup_memory_banks(fdt, start, size, CONFIG_NR_DRAM_BANKS); diff --git a/board/phytec/phycore_am68x/Kconfig b/board/phytec/phycore_am68x/Kconfig index 37912fb4ed3..d82cdaf819b 100644 --- a/board/phytec/phycore_am68x/Kconfig +++ b/board/phytec/phycore_am68x/Kconfig @@ -9,7 +9,7 @@ config SYS_BOARD default "phycore_am68x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am68x" @@ -27,7 +27,7 @@ config SYS_BOARD default "phycore_am68x" config SYS_VENDOR - default "phytec" + default "phytec" config SYS_CONFIG_NAME default "phycore_am68x" diff --git a/board/phytec/phycore_am68x/rm-cfg.yaml b/board/phytec/phycore_am68x/rm-cfg.yaml index 8796463129d..728bfe241a4 100644 --- a/board/phytec/phycore_am68x/rm-cfg.yaml +++ b/board/phytec/phycore_am68x/rm-cfg.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# Copyright (C) 2022-2026 Texas Instruments Incorporated - https://www.ti.com/ # # Resource management configuration for J721S2 # @@ -429,24 +429,24 @@ rm-cfg: reserved: 0 - start_resource: 10 - num_resource: 100 + num_resource: 98 type: 14528 host_id: 12 reserved: 0 - - start_resource: 110 + start_resource: 108 num_resource: 32 type: 14528 host_id: 13 reserved: 0 - - start_resource: 142 + start_resource: 140 num_resource: 21 type: 14528 host_id: 21 reserved: 0 - - start_resource: 163 + start_resource: 161 num_resource: 21 type: 14528 host_id: 23 @@ -1431,7 +1431,7 @@ rm-cfg: reserved: 0 - start_resource: 236 - num_resource: 20 + num_resource: 18 type: 16970 host_id: 128 reserved: 0 @@ -1497,7 +1497,7 @@ rm-cfg: reserved: 0 - start_resource: 3426 - num_resource: 1182 + num_resource: 1180 type: 16973 host_id: 128 reserved: 0 |