diff options
Diffstat (limited to 'board/xilinx')
| -rw-r--r-- | board/xilinx/Kconfig | 2 | ||||
| -rw-r--r-- | board/xilinx/common/board.c | 76 | ||||
| -rw-r--r-- | board/xilinx/microblaze-generic/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/xilinx/versal-net/board.c | 295 | ||||
| -rw-r--r-- | board/xilinx/versal/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/xilinx/versal/board.c | 108 | ||||
| -rw-r--r-- | board/xilinx/zynq/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/xilinx/zynq/cmds.c | 6 | ||||
| -rw-r--r-- | board/xilinx/zynqmp/MAINTAINERS | 2 | ||||
| -rw-r--r-- | board/xilinx/zynqmp/zynqmp.c | 43 |
10 files changed, 221 insertions, 317 deletions
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig index 5c3240da073..07fc8da1b71 100644 --- a/board/xilinx/Kconfig +++ b/board/xilinx/Kconfig @@ -67,7 +67,7 @@ config BOOT_SCRIPT_OFFSET default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2 default 0 if TARGET_XILINX_MBV help - Specifies distro boot script offset in NAND/QSPI/NOR flash. + Specifies distro boot script offset in NAND/QSPI/NOR flash. config CMD_FRU bool "FRU information for product" diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index d022308f943..52a2e8767d8 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -14,8 +14,12 @@ #include <init.h> #include <jffs2/load_kernel.h> #include <log.h> +#include <asm/io.h> #include <asm/global_data.h> #include <asm/sections.h> +#if defined(CONFIG_ARCH_VERSAL) || defined(CONFIG_ARCH_VERSAL2) +#include <asm/arch/hardware.h> +#endif #include <dm/uclass.h> #include <i2c.h> #include <linux/sizes.h> @@ -30,6 +34,8 @@ #include <rng.h> #include <slre.h> #include <soc.h> +#include <zynqmp_firmware.h> +#include <linux/bitfield.h> #include <linux/ctype.h> #include <linux/kernel.h> #include <u-boot/uuid.h> @@ -508,8 +514,7 @@ int board_late_init_xilinx(void) ret |= env_set_by_index("uuid", id, uuid); } - if (!(CONFIG_IS_ENABLED(NET) || - CONFIG_IS_ENABLED(NET_LWIP))) + if (!CONFIG_IS_ENABLED(NET)) continue; for (i = 0; i < EEPROM_HDR_NO_OF_MAC_ADDR; i++) { @@ -719,7 +724,74 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return reg + size; } +#endif + +#if defined(CONFIG_FWU_MULTI_BANK_UPDATE) + +#if defined(CONFIG_ARCH_VERSAL) || defined(CONFIG_ARCH_VERSAL2) +/* + * The Versal and Versal Gen 2 PMC Global pggs4 register contains below + * information in each byte as: + * + * Byte[3]: Magic number + * Byte[2]: Boot counter value + * Byte[1]: Boot partition value - boot index + * Byte[0]: Rollback counter value + */ + +#define MAGIC_NUM 0x1D +#define MAGIC_MASK GENMASK(31, 24) +#define BOOTINDEX_MASK GENMASK(15, 8) + +static int plat_get_boot_index(void) +{ + u32 val; + + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) + val = zynqmp_pm_get_pmc_global_pggs_reg(PMC_GLOBAL_PGGS4_REG); + else + val = readl(PMC_GLOBAL_PGGS4_REG); + + if (FIELD_GET(MAGIC_MASK, val) != MAGIC_NUM) { + log_err("FWU requires PMC magic number 0x%x\n", MAGIC_NUM); + return -EINVAL; + } + + return FIELD_GET(BOOTINDEX_MASK, val); +} +#endif + +int fwu_plat_get_alt_num(struct udevice __always_unused *dev, + efi_guid_t *image_id, u8 *alt_num) +{ + int ret; + + ret = fwu_mtd_get_alt_num(image_id, alt_num, "nor0"); + debug("%s: return %d\n", __func__, ret); + + return ret; +} +void fwu_plat_get_bootidx(uint *boot_idx) +{ + int ret; + u32 active_idx; + + ret = fwu_get_active_index(&active_idx); + if (ret < 0) + printf("%s: failed to read active index\n", __func__); + + ret = plat_get_boot_index(); + if (ret < 0) { + *boot_idx = 0; + printf("%s: failed and setup boot index to 0\n", __func__); + } else { + *boot_idx = ret; + } + + debug("%s: boot_idx: %d, active_idx: %d\n", + __func__, *boot_idx, active_idx); +} #endif #if IS_ENABLED(CONFIG_BOARD_RNG_SEED) diff --git a/board/xilinx/microblaze-generic/MAINTAINERS b/board/xilinx/microblaze-generic/MAINTAINERS index 29ed32f78f9..5220a51a5ea 100644 --- a/board/xilinx/microblaze-generic/MAINTAINERS +++ b/board/xilinx/microblaze-generic/MAINTAINERS @@ -1,7 +1,7 @@ MICROBLAZE-GENERIC BOARD M: Michal Simek <[email protected]> S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git +T: git https://git.u-boot-project.org/u-boot/custodians/u-boot-microblaze.git F: board/xilinx/microblaze-generic/ F: include/configs/microblaze-generic.h F: configs/microblaze-generic_defconfig diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 65b2a451ad7..ddac92660df 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -12,6 +12,7 @@ #include <env_internal.h> #include <log.h> #include <malloc.h> +#include <mmc.h> #include <spi.h> #include <time.h> #include <asm/cache.h> @@ -21,11 +22,9 @@ #include <asm/arch/sys_proto.h> #include <dm/device.h> #include <dm/uclass.h> -#include <zynqmp_firmware.h> #include <versalpl.h> #include "../common/board.h" -#include <linux/bitfield.h> #include <debug_uart.h> #include <generated/dt.h> @@ -49,92 +48,6 @@ int board_init(void) return 0; } -static u32 platform_id, platform_version; - -char *soc_name_decode(void) -{ - char *name, *platform_name; - - switch (platform_id) { - case VERSAL_NET_SPP: - platform_name = "ipp"; - break; - case VERSAL_NET_EMU: - platform_name = "emu"; - break; - case VERSAL_NET_QEMU: - platform_name = "qemu"; - break; - default: - return NULL; - } - - /* - * --rev. are 6 chars - * max platform name is qemu which is 4 chars - * platform version number are 1+1 - * Plus 1 char for \n - */ - name = calloc(1, strlen(CONFIG_SYS_BOARD) + 13); - if (!name) - return NULL; - - sprintf(name, "%s-%s-rev%d.%d", CONFIG_SYS_BOARD, - platform_name, platform_version / 10, - platform_version % 10); - - return name; -} - -bool soc_detection(void) -{ - u32 version, ps_version; - - version = readl(PMC_TAP_VERSION); - platform_id = FIELD_GET(PLATFORM_MASK, version); - ps_version = FIELD_GET(PS_VERSION_MASK, version); - - debug("idcode %x, version %x, usercode %x\n", - readl(PMC_TAP_IDCODE), version, - readl(PMC_TAP_USERCODE)); - - debug("pmc_ver %lx, ps version %x, rtl version %lx\n", - FIELD_GET(PMC_VERSION_MASK, version), - ps_version, - FIELD_GET(RTL_VERSION_MASK, version)); - - platform_version = FIELD_GET(PLATFORM_VERSION_MASK, version); - - if (platform_id == VERSAL_NET_SPP || - platform_id == VERSAL_NET_EMU) { - if (ps_version == PS_VERSION_PRODUCTION) { - /* - * ES1 version ends at 1.9 version where there was +9 - * used because of IPP/SPP conversion. Production - * version have platform_version started from 0 again - * that's why adding +20 to continue with the same line. - * It means the last ES1 version ends at 1.9 version and - * new PRODUCTION line starts at 2.0. - */ - platform_version += 20; - } else { - /* - * 9 is diff for - * 0 means 0.9 version - * 1 means 1.0 version - * 2 means 1.1 version - * etc, - */ - platform_version += 9; - } - } - - debug("Platform id: %d version: %d.%d\n", platform_id, - platform_version / 10, platform_version % 10); - - return true; -} - int board_early_init_f(void) { if (IS_ENABLED(CONFIG_DEBUG_UART)) { @@ -148,118 +61,103 @@ int board_early_init_f(void) int board_early_init_r(void) { - u32 val; - if (current_el() != 3) return 0; - debug("iou_switch ctrl div0 %x\n", - readl(&crlapb_base->iou_switch_ctrl)); - - writel(IOU_SWITCH_CTRL_CLKACT_BIT | - (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), - &crlapb_base->iou_switch_ctrl); - - /* Global timer init - Program time stamp reference clk */ - val = readl(&crlapb_base->timestamp_ref_ctrl); - val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; - writel(val, &crlapb_base->timestamp_ref_ctrl); - - debug("ref ctrl 0x%x\n", - readl(&crlapb_base->timestamp_ref_ctrl)); - - /* Clear reset of timestamp reg */ - writel(0, &crlapb_base->rst_timestamp); - - /* - * Program freq register in System counter and - * enable system counter. - */ - writel(CONFIG_COUNTER_FREQUENCY, - &iou_scntr_secure->base_frequency_id_register); - - debug("counter val 0x%x\n", - readl(&iou_scntr_secure->base_frequency_id_register)); - - writel(IOU_SCNTRS_CONTROL_EN, - &iou_scntr_secure->counter_control_register); - - debug("scntrs control 0x%x\n", - readl(&iou_scntr_secure->counter_control_register)); - debug("timer 0x%llx\n", get_ticks()); - debug("timer 0x%llx\n", get_ticks()); + versal_net_timer_setup(); return 0; } -static u8 versal_net_get_bootmode(void) +static int spi_get_bootseq(u8 bootmode, const char **modename) { - u8 bootmode; - u32 reg = 0; + struct udevice *dev; + const char *name; + int bootseq; - if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) { - reg = zynqmp_pm_get_bootmode_reg(); - } else { - reg = readl(&crp_base->boot_mode_usr); + switch (bootmode) { + case QSPI_MODE_24BIT: + if (modename) + *modename = "QSPI_MODE_24\n"; + name = "spi@f1030000"; + break; + case QSPI_MODE_32BIT: + if (modename) + *modename = "QSPI_MODE_32\n"; + name = "spi@f1030000"; + break; + case OSPI_MODE: + if (modename) + *modename = "OSPI_MODE\n"; + name = "spi@f1010000"; + break; + default: + return -1; } - if (reg >> BOOT_MODE_ALT_SHIFT) - reg >>= BOOT_MODE_ALT_SHIFT; + if (uclass_get_device_by_name(UCLASS_SPI, name, &dev)) { + debug("SPI driver for %s is not present\n", name); + return -1; + } - bootmode = reg & BOOT_MODES_MASK; + bootseq = dev_seq(dev); + debug("bootseq %d\n", bootseq); - return bootmode; + return bootseq; } int spi_get_env_dev(void) { + return spi_get_bootseq(versal_net_get_bootmode(), NULL); +} + +static int mmc_get_bootseq(u8 bootmode, const char **modename) +{ struct udevice *dev; - int bootseq = -1; + const char *name; - switch (versal_net_get_bootmode()) { - case QSPI_MODE_24BIT: - puts("QSPI_MODE_24\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1030000", &dev)) { - debug("QSPI driver for QSPI device is not present\n"); - break; - } - bootseq = dev_seq(dev); + switch (bootmode) { + case SD_MODE: + if (modename) + *modename = "SD_MODE\n"; + name = "mmc@f1040000"; break; - case QSPI_MODE_32BIT: - puts("QSPI_MODE_32\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1030000", &dev)) { - debug("QSPI driver for QSPI device is not present\n"); - break; - } - bootseq = dev_seq(dev); + case EMMC_MODE: + if (modename) + *modename = "EMMC_MODE\n"; + name = "mmc@f1050000"; break; - case OSPI_MODE: - puts("OSPI_MODE\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1010000", &dev)) { - debug("OSPI driver for OSPI device is not present\n"); - break; - } - bootseq = dev_seq(dev); + case SD_MODE1: + case SD1_LSHFT_MODE: + if (modename) + *modename = "SD_MODE1\n"; + name = "mmc@f1050000"; break; default: - break; + return -1; } - debug("bootseq %d\n", bootseq); - return bootseq; + if (uclass_get_device_by_name(UCLASS_MMC, name, &dev)) { + debug("MMC driver for %s is not present\n", name); + return -1; + } + + return dev_seq(dev); +} + +int mmc_get_env_dev(void) +{ + return mmc_get_bootseq(versal_net_get_bootmode(), NULL); } static int boot_targets_setup(void) { u8 bootmode; - struct udevice *dev; int bootseq = -1; int bootseq_len = 0; int env_targets_len = 0; const char *mode = NULL; + const char *modename = NULL; char *new_targets; char *env_targets; @@ -276,69 +174,28 @@ static int boot_targets_setup(void) mode = "jtag pxe dhcp"; break; case QSPI_MODE_24BIT: - puts("QSPI_MODE_24\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1030000", &dev)) { - debug("QSPI driver for QSPI device is not present\n"); - break; - } - mode = "xspi"; - bootseq = dev_seq(dev); - break; case QSPI_MODE_32BIT: - puts("QSPI_MODE_32\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1030000", &dev)) { - debug("QSPI driver for QSPI device is not present\n"); - break; - } - mode = "xspi"; - bootseq = dev_seq(dev); - break; case OSPI_MODE: - puts("OSPI_MODE\n"); - if (uclass_get_device_by_name(UCLASS_SPI, - "spi@f1010000", &dev)) { - debug("OSPI driver for OSPI device is not present\n"); - break; - } - mode = "xspi"; - bootseq = dev_seq(dev); - break; - case EMMC_MODE: - puts("EMMC_MODE\n"); - mode = "mmc"; - bootseq = dev_seq(dev); + bootseq = spi_get_bootseq(bootmode, &modename); + if (modename) + puts(modename); + if (bootseq >= 0) + mode = "xspi"; break; case SELECTMAP_MODE: puts("SELECTMAP_MODE\n"); break; - case SD_MODE: - puts("SD_MODE\n"); - if (uclass_get_device_by_name(UCLASS_MMC, - "mmc@f1040000", &dev)) { - debug("SD0 driver for SD0 device is not present\n"); - break; - } - debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); - - mode = "mmc"; - bootseq = dev_seq(dev); - break; case SD1_LSHFT_MODE: puts("LVL_SHFT_"); fallthrough; + case SD_MODE: + case EMMC_MODE: case SD_MODE1: - puts("SD_MODE1\n"); - if (uclass_get_device_by_name(UCLASS_MMC, - "mmc@f1050000", &dev)) { - debug("SD1 driver for SD1 device is not present\n"); - break; - } - debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); - - mode = "mmc"; - bootseq = dev_seq(dev); + bootseq = mmc_get_bootseq(bootmode, &modename); + if (modename) + puts(modename); + if (bootseq >= 0) + mode = "mmc"; break; default: printf("Invalid Boot Mode:0x%x\n", bootmode); diff --git a/board/xilinx/versal/MAINTAINERS b/board/xilinx/versal/MAINTAINERS index a13b6566164..07173ee916f 100644 --- a/board/xilinx/versal/MAINTAINERS +++ b/board/xilinx/versal/MAINTAINERS @@ -1,7 +1,7 @@ XILINX_VERSAL BOARDS M: Michal Simek <[email protected]> S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git +T: git https://git.u-boot-project.org/u-boot/custodians/u-boot-microblaze.git F: arch/arm/dts/versal* F: board/xilinx/versal/ F: include/configs/xilinx_versal* diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 9371c30ea27..0537517b1b2 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -10,6 +10,7 @@ #include <env.h> #include <efi_loader.h> #include <fdtdec.h> +#include <fwu.h> #include <init.h> #include <env_internal.h> #include <log.h> @@ -27,7 +28,6 @@ #include <dm/device.h> #include <dm/uclass.h> #include <versalpl.h> -#include <zynqmp_firmware.h> #include "../common/board.h" DECLARE_GLOBAL_DATA_PTR; @@ -39,40 +39,15 @@ static xilinx_desc versalpl = { }; #endif -static u8 versal_get_bootmode(void) -{ - u8 bootmode; - u32 reg = 0; - - if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) { - reg = zynqmp_pm_get_bootmode_reg(); - } else { - reg = readl(&crp_base->boot_mode_usr); - } - - if (reg >> BOOT_MODE_ALT_SHIFT) - reg >>= BOOT_MODE_ALT_SHIFT; - - bootmode = reg & BOOT_MODES_MASK; - - return bootmode; -} - static u32 versal_multi_boot(void) { u8 bootmode = versal_get_bootmode(); - u32 reg = 0; /* Mostly workaround for QEMU CI pipeline */ if (bootmode == JTAG_MODE) return 0; - if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) - reg = zynqmp_pm_get_pmc_multi_boot_reg(); - else - reg = readl(PMC_MULTI_BOOT_REG); - - return reg & PMC_MULTI_BOOT_MASK; + return versal_pmc_multi_boot(); } int board_init(void) @@ -93,46 +68,10 @@ int board_init(void) int board_early_init_r(void) { - u32 val; - if (current_el() != 3) return 0; - debug("iou_switch ctrl div0 %x\n", - readl(&crlapb_base->iou_switch_ctrl)); - - writel(IOU_SWITCH_CTRL_CLKACT_BIT | - (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), - &crlapb_base->iou_switch_ctrl); - - /* Global timer init - Program time stamp reference clk */ - val = readl(&crlapb_base->timestamp_ref_ctrl); - val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; - writel(val, &crlapb_base->timestamp_ref_ctrl); - - debug("ref ctrl 0x%x\n", - readl(&crlapb_base->timestamp_ref_ctrl)); - - /* Clear reset of timestamp reg */ - writel(0, &crlapb_base->rst_timestamp); - - /* - * Program freq register in System counter and - * enable system counter. - */ - writel(CONFIG_COUNTER_FREQUENCY, - &iou_scntr_secure->base_frequency_id_register); - - debug("counter val 0x%x\n", - readl(&iou_scntr_secure->base_frequency_id_register)); - - writel(IOU_SCNTRS_CONTROL_EN, - &iou_scntr_secure->counter_control_register); - - debug("scntrs control 0x%x\n", - readl(&iou_scntr_secure->counter_control_register)); - debug("timer 0x%llx\n", get_ticks()); - debug("timer 0x%llx\n", get_ticks()); + versal_timer_setup(); return 0; } @@ -293,7 +232,8 @@ int board_late_init(void) { int ret; - if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) + if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && + !IS_ENABLED(CONFIG_FWU_MULTI_BANK_UPDATE)) configure_capsule_updates(); if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { @@ -374,6 +314,8 @@ enum env_location env_get_location(enum env_operation op, int prio) #define DFU_ALT_BUF_LEN SZ_1K +#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && \ + !defined(CONFIG_FWU_MULTI_BANK_UPDATE) static void mtd_found_part(u32 *base, u32 *size) { struct mtd_info *part, *mtd; @@ -450,3 +392,39 @@ void configure_capsule_updates(void) update_info.dfu_string = strdup(buf); debug("Capsule DFU: %s\n", update_info.dfu_string); } +#endif + +#if defined(CONFIG_FWU_MULTI_BANK_UPDATE) + +/* Generate dfu_alt_info from partitions */ +void set_dfu_alt_info(char *interface, char *devstr) +{ + int ret; + struct mtd_info *mtd; + + /* + * It is called multiple times for every image + * per bank that's why enough to set it up once. + */ + if (env_get("dfu_alt_info")) + return; + + ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); + memset(buf, 0, DFU_ALT_BUF_LEN); + + mtd_probe_devices(); + + mtd = get_mtd_device_nm("nor0"); + if (IS_ERR_OR_NULL(mtd)) + return; + + ret = fwu_gen_alt_info_from_mtd(buf, DFU_ALT_BUF_LEN, mtd); + if (ret < 0) { + log_err("Error: Failed to generate dfu_alt_info. (%d)\n", ret); + return; + } + log_debug("Make dfu_alt_info: '%s'\n", buf); + + env_set("dfu_alt_info", buf); +} +#endif diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS index b5b9e2fe40a..3eb1a451b58 100644 --- a/board/xilinx/zynq/MAINTAINERS +++ b/board/xilinx/zynq/MAINTAINERS @@ -1,7 +1,7 @@ ZYNQ BOARD M: Michal Simek <[email protected]> S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git +T: git https://git.u-boot-project.org/u-boot/custodians/u-boot-microblaze.git F: arch/arm/dts/zynq-* F: board/xilinx/zynq/ F: include/configs/zynq*.h diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c index 05ecb75406b..d8eff203a56 100644 --- a/board/xilinx/zynq/cmds.c +++ b/board/xilinx/zynq/cmds.c @@ -347,10 +347,10 @@ static int zynq_verify_image(u32 src_ptr) * This validation is just for PS DDR. * TODO: Update this for PL DDR check as well. */ - if (part_load_addr < gd->bd->bi_dram[0].start && + if (part_load_addr < gd->dram[0].start && ((part_load_addr + part_data_len) > - (gd->bd->bi_dram[0].start + - gd->bd->bi_dram[0].size))) { + (gd->dram[0].start + + gd->dram[0].size))) { printf("INVALID_LOAD_ADDRESS_FAIL\n"); return -1; } diff --git a/board/xilinx/zynqmp/MAINTAINERS b/board/xilinx/zynqmp/MAINTAINERS index a4527f8959a..3db240782f4 100644 --- a/board/xilinx/zynqmp/MAINTAINERS +++ b/board/xilinx/zynqmp/MAINTAINERS @@ -1,7 +1,7 @@ XILINX_ZYNQMP BOARDS M: Michal Simek <[email protected]> S: Maintained -T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git +T: git https://git.u-boot-project.org/u-boot/custodians/u-boot-microblaze.git F: arch/arm/dts/zynqmp-* F: arch/arm/dts/avnet-ultra96* F: board/xilinx/common/ diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 769e52bcfb5..5d13881f3ec 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -24,7 +24,6 @@ #include <malloc.h> #include <memalign.h> #include <wdt.h> -#include <asm/arch/clk.h> #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/arch/psu_init_gpl.h> @@ -183,6 +182,23 @@ int board_init(void) zynqmppl.name = strdup(name); fpga_init(); fpga_add(fpga_xilinx, &zynqmppl); + + /* + * zu63dr_SE and zu67dr_SE share ID 0x046D7093. + * Register zu63dr_SE as alternate device. + */ + if (!strcmp(name, "zu67dr_SE")) { + xilinx_desc *alt; + + alt = calloc(1, sizeof(*alt)); + if (!alt) { + log_err("Failed to allocate alt FPGA descriptor\n"); + } else { + *alt = zynqmppl; + alt->name = "zu63dr_SE"; + fpga_add(fpga_xilinx, alt); + } + } } } #endif @@ -197,26 +213,11 @@ int board_init(void) int board_early_init_r(void) { - u32 val; - if (current_el() != 3) return 0; - val = readl(&crlapb_base->timestamp_ref_ctrl); - val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; + zynqmp_timer_setup(); - if (!val) { - val = readl(&crlapb_base->timestamp_ref_ctrl); - val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT; - writel(val, &crlapb_base->timestamp_ref_ctrl); - - /* Program freq register in System counter */ - writel(zynqmp_get_system_timer_freq(), - &iou_scntr_secure->base_frequency_id_register); - /* And enable system counter */ - writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN, - &iou_scntr_secure->counter_control_register); - } return 0; } @@ -262,8 +263,8 @@ int dram_init(void) #else int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = get_effective_memsize(); + gd->dram[0].start = CFG_SYS_SDRAM_BASE; + gd->dram[0].size = get_effective_memsize(); mem_map_fill(); @@ -524,10 +525,6 @@ int board_late_init(void) { int ret, multiboot; -#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD) - usb_ether_init(); -#endif - if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) configure_capsule_updates(); |