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path: root/drivers/crypto/aspeed
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-rw-r--r--drivers/crypto/aspeed/Kconfig8
-rw-r--r--drivers/crypto/aspeed/aspeed_acry.c4
-rw-r--r--drivers/crypto/aspeed/aspeed_hace.c2
-rw-r--r--drivers/crypto/aspeed/cptra_ecdsa.c2
-rw-r--r--drivers/crypto/aspeed/cptra_sha.c2
5 files changed, 9 insertions, 9 deletions
diff --git a/drivers/crypto/aspeed/Kconfig b/drivers/crypto/aspeed/Kconfig
index 401225b8528..a4710257f62 100644
--- a/drivers/crypto/aspeed/Kconfig
+++ b/drivers/crypto/aspeed/Kconfig
@@ -15,11 +15,11 @@ config ASPEED_ACRY
bool "ASPEED RSA and ECC Engine"
depends on ASPEED_AST2600
help
- Select this option to enable a driver for using the RSA/ECC engine in
- the ASPEED BMC SoCs.
+ Select this option to enable a driver for using the RSA/ECC engine in
+ the ASPEED BMC SoCs.
- Enabling this allows the use of RSA/ECC operations in hardware without requiring the
- software implementations. It also improves performance and saves code size.
+ Enabling this allows the use of RSA/ECC operations in hardware without requiring the
+ software implementations. It also improves performance and saves code size.
config ASPEED_CPTRA_SHA
bool "Caliptra SHA ACC for Aspeed AST27xx SoCs"
diff --git a/drivers/crypto/aspeed/aspeed_acry.c b/drivers/crypto/aspeed/aspeed_acry.c
index e3f81ebd5c7..ff01256e150 100644
--- a/drivers/crypto/aspeed/aspeed_acry.c
+++ b/drivers/crypto/aspeed/aspeed_acry.c
@@ -144,13 +144,13 @@ static int aspeed_acry_probe(struct udevice *dev)
return ret;
}
- acry->base = devfdt_get_addr_index(dev, 0);
+ acry->base = dev_read_addr_index(dev, 0);
if (acry->base == FDT_ADDR_T_NONE) {
debug("Failed to get acry base\n");
return acry->base;
}
- acry->sram_base = devfdt_get_addr_index(dev, 1);
+ acry->sram_base = dev_read_addr_index(dev, 1);
if (acry->sram_base == FDT_ADDR_T_NONE) {
debug("Failed to get acry SRAM base\n");
return acry->sram_base;
diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c
index 17cc30a7b54..22b5008a296 100644
--- a/drivers/crypto/aspeed/aspeed_hace.c
+++ b/drivers/crypto/aspeed/aspeed_hace.c
@@ -341,7 +341,7 @@ static int aspeed_hace_probe(struct udevice *dev)
return rc;
}
- hace->base = devfdt_get_addr(dev);
+ hace->base = dev_read_addr(dev);
return rc;
}
diff --git a/drivers/crypto/aspeed/cptra_ecdsa.c b/drivers/crypto/aspeed/cptra_ecdsa.c
index 4b70d89def7..7603ca373ff 100644
--- a/drivers/crypto/aspeed/cptra_ecdsa.c
+++ b/drivers/crypto/aspeed/cptra_ecdsa.c
@@ -149,7 +149,7 @@ static int cptra_ecdsa_probe(struct udevice *dev)
{
struct cptra_ecdsa *ce = dev_get_priv(dev);
- ce->regs = (void *)devfdt_get_addr(dev);
+ ce->regs = (void *)dev_read_addr(dev);
if (ce->regs == (void *)FDT_ADDR_T_NONE) {
debug("cannot map Caliptra mailbox registers\n");
return -EINVAL;
diff --git a/drivers/crypto/aspeed/cptra_sha.c b/drivers/crypto/aspeed/cptra_sha.c
index 26b97bdd92b..f57778e160d 100644
--- a/drivers/crypto/aspeed/cptra_sha.c
+++ b/drivers/crypto/aspeed/cptra_sha.c
@@ -219,7 +219,7 @@ static int cptra_sha_probe(struct udevice *dev)
{
struct cptra_sha *cs = dev_get_priv(dev);
- cs->regs = (void *)devfdt_get_addr(dev);
+ cs->regs = (void *)dev_read_addr(dev);
if (cs->regs == (void *)FDT_ADDR_T_NONE) {
debug("cannot map Caliptra SHA ACC registers\n");
return -ENODEV;