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Now we have proper flush and invalidate helpers, we can use them
directly to operate on the scsi_cmd data.
Likewise, we do not need to flush then invalidate, just flush _or_
invalidate depending on the data direction.
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Venkatesh Yadav Abbarapu <[email protected]>
Tested-by: Julius Lehmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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There is no need to flush and invalidate all data updated by the
driver, mainly because on ARM platforms flush also invalidates
the cachelines.
Split the function in two and add the appropriate cacheline
invalidates after the UFS DMA operation finishes to make sure
we read from memory.
Flushing then invalidating cacheline unaligned data causes data
corruption issues on Qualcomm platforms, and is largely unnecessary
anyway, so let's cleanup the cache operations.
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Venkatesh Yadav Abbarapu <[email protected]>
Tested-by: Julius Lehmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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The current calculation will omit doing a flush/invalidate on the last
cacheline if the base address is not aligned with DMA_MINALIGN.
This causes commands failures and write corruptions on Qualcomm
platforms.
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Venkatesh Yadav Abbarapu <[email protected]>
Tested-by: Julius Lehmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Align the allocation size with DMA_MINALIGN to make sure we do not
flush/invalidate data from following allocations.
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Venkatesh Yadav Abbarapu <[email protected]>
Tested-by: Julius Lehmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to
use OF_UPSTREAM. We are doing it for this SoC family only since the DTs
between the U-Boot and the kernel repo are exactly identical, whereas other
families have one compatibility fix in U-Boot to allow booting older kernels.
Other will follow if this plays out well.
The biggest chunk otherwise is adding support for an Anbernic game console,
using the H700 SoC. For that we need to enhance the DRAM support code, and
pick two DT commits from the mainline kernel/DT rebasing repo, followed
by the defconfig patch.
On top of that two small fixes for the old Allwinner A80.
Gitlab CI passed, and I booted that briefly on some boards, including an
H616 and an H618 one (with LPDDR4).
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22644
- Add fast authentication method for i.MX8M signing.
- Migrate imx8mp-debix-model-a to OF_UPSTREAM.
- Update MAINTAINERS file globs for i.MX6/i.MX8MP DHSOM.
- Improve ELE driver.
- Add i.MX8MP Dummy clk to fix regression.
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Synchronize R-Car R8A779H0 V4M clock tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A779H0 V4M PFC tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.10.9,
commit 1611860f184a2c9e74ed593948d43657734a7098 .
Signed-off-by: Marek Vasut <[email protected]>
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Implement invalidate_icache_all() by clearing all V bits in
IC and OC. This is done by setting CCR cache control register
ICI and OCI bits.
Signed-off-by: Marek Vasut <[email protected]>
---
Cc: Ilias Apalodimas <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: [email protected]
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Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.
Signed-off-by: Tom Rini <[email protected]>
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This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 2560×1600
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system
works perfectly fine without it.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Obtain USB phy configuration from phy node if such exists
and is enabled. If no, set default values.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Add previously undocumented SKU - AP20H found in LG Optimus 2X (P990).
Correct existing T20_7 name as it's proper name is AP20.
Signed-off-by: Ion Agorria <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Change %02X to %02x since it always displayed 00 otherwise.
Signed-off-by: Ion Agorria <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use board revision detection mechanism to choose correct DTB.
Adjust documentation and build setup accordingly.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use SPL GPIO functions to simplify RCM hook on HTC One X.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Use PMIC detection mechanism to find correct configuration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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In some cases access to GPIOs is needed so early that DM
is not ready even nearly. These functions are exactly for
this case.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Buildman has difficulties with constructing multi-dtb images, so
let's add a temporary custom recipe for it.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Add common logic for dynamic dtb switch and DM reload if board
features multi-dtb support.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
header
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Convert boards to use text based env. This is the first stage of
conversion, common inclusions should be converted next.
Acked-by: Francesco Dolcini <[email protected]> # Toradex Apalis TK1
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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TegraPT is compatible with EFI part but it can't pass Protective MBR check.
Skip this check if CONFIG_TEGRA_PARTITION is enabled, storage uclass is MMC
and devnum is 0. Note, eMMC on supported devices MUST be aliased to mmc0.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk
api will return failure.
The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device
tree. This will be done in Kernel device tree and sync to U-Boot in
future:
https://lore.kernel.org/all/[email protected]/
Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API")
Reported-by: Gilles Talis <[email protected]>
Tested-by: Gilles TALIS <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Device tree for this board can be deleted. Device tree location
now points to the freescale/ directory.
Use absolute path to PMIC node entry and its regulators as
device tree in kernel does not provide corresponding labels
Signed-off-by: Gilles Talis <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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The SCU API alreay has been converted to return Linux error code,
using SCU error code is not correct here, although SC_ERR_NONE is value
as 0.
Signed-off-by: Peng Fan <[email protected]>
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Using the PKI tree with SRKs as intermediate CA isn't necessary or even
desirable in some situations (boot time, for example). Add the possibility
to use the "fast authentication" method where the image and CSF are both
signed using the SRK [1, p.63].
[1] https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/imx-processors/202591/1/CST_UG.pdf
Signed-off-by: Brian Ruley <[email protected]>
Cc: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Simplify code and conform to the style guide used in the project by
making the following changes:
* Capitalize global constants
* Use single quotes for multiline strings (except docstrings)
* Fix line width to 79 cols
* Use f-string instead of formatting a regular string or using a
complicated concatenation
* Move common suffix used in keys to a global variable "KEY_NAME"
to reduce the likelihood of typos and making future changes
easier
Signed-off-by: Brian Ruley <[email protected]>
Cc: Marek Vasut <[email protected]>
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Update the MAINTAINERS file glob to cover all of i.MX8MP DHSOM related files.
Signed-off-by: Marek Vasut <[email protected]>
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Update the MAINTAINERS file glob to cover all of i.MX6 DHSOM related files.
Signed-off-by: Marek Vasut <[email protected]>
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When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.
Add ELE shadow fuse read and write to current ELE fuse driver.
But when LC is OEM closed, the ELE read/write shadow fuse APIs are
forbidden. Reading from any fuse will return error. This causes
problem to u-boot which must read out some fuse no matter whatever LC.
So we have to change back to read from FSB and ELE common fuse read API.
For using ELE shadow read API for development purpose like checking
the ELE shadow fuse write result, user can set env variable
"enable_ele_shd" to y to switch it.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.
And When calling ELE API, res parameter will pass to ELE API to get ELE
response value for failure. So most of usage does not initialize
this variable and print it after calling ELE API.
However, when ELE API returns failure, we can't ensure this res is
always set because there may be other failure like MU failure.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add ELE APIs to support read and write shadow fuses
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.
Also update header order
Signed-off-by: Peng Fan <[email protected]>
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When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.
Cc: Alice Guo <[email protected]>
Cc: Marek Vasut <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The MU parameter register can provide the TR and RR number.
For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP,
so update the driver to read the PAR for exact TR and RR number.
Also update compatible string for i.MX95 ELE MU.
Cc: Alice Guo <[email protected]>
Cc: Marek Vasut <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
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This board clearly develops first in Linux which had more
hardware listed, so let's start to use OF_UPSTREAM.
This makes the NAND driver work.
Suggested-by: Neil Armstrong <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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This adds reasonable NAND options to the BCM96846 reference design:
- CMD_NAND, MTD_RAW_NAND
- Disable SYS_NAND_ONFI_DETECTION as this just give error messages
- MTD, MTDPARTS with DM and related config options
- CMD_UBI and CMD_UBIFS as this is likely used with ubi/ubifs
What I didn't add was something like the following:
CONFIG_MTDPARTS_DEFAULT="nand0:256k(cfi),257024k(image)"
Because I don't actually have a BCM96846 reference design. These
are only available to Broadcom and their customers I think,
but perhaps the people at Broadcom can provide the detail of
the flash layout for BCM96846 so we can add this too so the
bcm96846_config is usable out of the box.
Signed-off-by: Linus Walleij <[email protected]>
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The BCM6846 has the BRCMBCA NAND controller so enable
it.
Reviewed-by: Michael Trimarchi <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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The Broadcom BCA platforms are broadband access SoCs.
This is a port of the upstream Linux driver to U-Boot.
It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c
from Linux v6.11.
Reviewed-by: Michael Trimarchi <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
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When ECC parameters are not specified in DT, first try ONFI ECC parameters
before fallback to maximum strength.
It's the Linux driver behavior since the driver rewriting in f88fc12.
From then 2 nand system refactors have been done in 6a1b66d6 and 53576c7b,
chip->ecc_strength_ds and chip->ecc_step_ds became
nanddev_get_ecc_requirements(). U-Boot didn't follow the refactor and
always use these 2 fields.
v2: Fix formatting, add upstream commit hash.
Signed-off-by: Zixun LI <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-by: Balamanikandan Gunasundar
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Simon Glass <[email protected]> says:
When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL
Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.
For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:
#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.
This series starts a change in terminology and usage to resolve the
above issues:
- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_
It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.
This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.
The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
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