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TI's J722S SoC has one instance of PCIe namely PCIe0 which is a Gen3
single lane PCIe controller. Add support for the "ti,j722s-pcie-host"
compatible specific to J722S SoC.
Based on:
https://lore.kernel.org/all/[email protected]/
Signed-off-by: George McCollister <[email protected]>
Tested-by: Bryan Brattlof <[email protected]>
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Add support to provide refclk to PCIe connector.
Based on: https://lore.kernel.org/r/[email protected]
Signed-off-by: George McCollister <[email protected]>
Tested-by: Bryan Brattlof <[email protected]>
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cmn_refclk_<p/m> lines in Torrent SERDES are used for connecting an
external reference clock. cmn_refclk_<p/m> can also be configured to
output the reference clock. Model this derived reference clock as a
"clock" so that platforms like AM642 EVM can enable it.
This is used by PCIe to use the same refclk both in local SERDES
and remote device. Add support here to drive refclk out.
Based on: https://lore.kernel.org/all/[email protected]/
Signed-off-by: George McCollister <[email protected]>
Tested-by: Bryan Brattlof <[email protected]>
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cmn_refclk_<p/m> lines in Torrent SERDES are used for an connecting
external reference clock. cmn_refclk_<p/m> can also be configured to
output the reference clock. In order to drive the refclk out from the
SERDES (Cadence Torrent), PHY_EN_REFCLK should be set in SERDES_RST of
WIZ. Model PHY_EN_REFCLK as a clock, so that platforms like AM642 EVM
can enable it.
Based on: https://lore.kernel.org/r/[email protected]
Signed-off-by: George McCollister <[email protected]>
Tested-by: Bryan Brattlof <[email protected]>
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Use the same mechanism as the Linux kernel to skip unnecessary (and in
the case of the J722S, errant) scanning of direct children of root
ports, downstream ports or bridges.
Based on Linux PCI code in the following files as of b927546677c8:
drivers/pci/probe.c
drivers/pci/pci.h
include/linux/pci.h
Signed-off-by: George McCollister <[email protected]>
Tested-by: Bryan Brattlof <[email protected]>
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Mikhail Kshevetskiy <[email protected]> says:
It was noted that a GPT partition with the maximum available partition
number (ex: /dev/mmcblk128) can't be read/write from U-Boot using
read/write commands. Futher investigation shows that the problem is
deeper.
This set of patches fixes uncovered issues.
Link: https://lore.kernel.org/r/[email protected]
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mtdpart internally enumerate partitions starting from zero, but partition
driver API enumerate partitions starting from 1, so wrong partition will
be queried. This is wrong.
Unnecessary debug message also was removed.
Fixes: c29a6daec184 ("disk: support MTD partitions")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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GPT disk partition with max available number (ex: /dev/mmcblk128) can't
be used from U-Boot. Here is an example:
=> mmc part
Partition Map for mmc device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00001000 0x000013ff "env1"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb02
2 0x00001400 0x000017ff "env2"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb03
.................
8 0x00158000 0x0034bfff "apps"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb09
128 0x00000420 0x00000fff "fip"
attrs: 0x0000000000000000
type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
guid: 5452574f-2211-4433-5566-778899aabb01
=> gpt setenv mmc 0 fip
error!
=> gpt setenv mmc 0 apps
success!
The error is caused by invalid boundary checks. This patch fixes an
issue.
Fixes: 12fc1f3bb223 ("cmd: gpt: add eMMC and GPT support")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Acked-by: Quentin Schulz <[email protected]>
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GPT disk partition with max available number (ex: /dev/mmcblk128) can't
be read/write from U-Boot using read/write command. Here is an example:
=> mmc part
Partition Map for mmc device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00001000 0x000013ff "env1"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb02
2 0x00001400 0x000017ff "env2"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb03
.................
8 0x00158000 0x0034bfff "apps"
attrs: 0x0000000000000000
type: 0fc63daf-8483-4772-8e79-3d69d8477de4
guid: 5452574f-2211-4433-5566-778899aabb09
128 0x00000420 0x00000fff "fip"
attrs: 0x0000000000000000
type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
guid: 5452574f-2211-4433-5566-778899aabb01
=> read mmc 0#fip ${loadaddr} 0 4
Could not find "fip" partition
** Bad device specification mmc 0#fip **
** Bad device specification mmc 0#fip **
Couldn't find partition mmc 0#fip
The error is caused by invalid boundary checks. This patch fixes an
issue.
Fixes: 43fd4bcefd4e ("disk: part: implement generic function part_get_info_by_uuid()")
Fixes: 56670d6fb83f ("disk: part: use common api to lookup part driver")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Acked-by: Quentin Schulz <[email protected]>
Reviewed-By: Michael Trimarchi <[email protected]>
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Pull request net-20260204.
net:
- phy: aquantia: add support for Marvell CUX3410 10Gb PHY
- drivers: phy: fix code documentation typo udevice_ops
net-lwip:
- Command fixes and improvements (dhcp, dns, nfs)
- dhcp, tftp: do not write past end of buffer
- Add TFTPSERVERIP Kconfig option
misc:
- Update Jerome's email address
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According to commit 84a42ae36683 ("dm: core: Rename device node to indicate it is private")
node_ should not be aaccess outside driver model.
Signed-off-by: Andy Yan <[email protected]>
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Currently, atmel-usart does not respect CONFIG_DEBUG_UART_SKIP_INIT so
it will always configure the debug UART.
However, this is unwanted on platforms on which TF-A or some other firmware
has already configured the debug UART.
This will be used for Microchip LAN969x support, so simply return early if
CONFIG_DEBUG_UART_SKIP_INIT is set.
Signed-off-by: Robert Marko <[email protected]>
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Microchip LAN969x will not include any arch specific clk.h nor hardware.h,
so in order to support it only include <asm/arch/clk.h> and
<asm/arch/hardware.h> when AT91 is selected.
Signed-off-by: Robert Marko <[email protected]>
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Pointer size cannot be assumed to be 32-bit, so use uintptr_t instead of
uint32_t.
Fixes the below build warning on 64-bit builds:
drivers/serial/atmel_usart.c: In function ‘atmel_serial_probe’:
drivers/serial/atmel_usart.c:275:23: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
275 | priv->usart = (atmel_usart3_t *)plat->base_addr;
Signed-off-by: Robert Marko <[email protected]>
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Move the arch specific atmel_serial.h header from AT91 to the generic
include/dm/platform_data.
This will be used for support on Microchip LAN969x.
Signed-off-by: Robert Marko <[email protected]>
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The CUX3410 is similar to AQR113C. The main difference is CUX3410 does not
support MACSEC.
Signed-off-by: Bo-Cun Chen <[email protected]>
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Prefer use of a 'nfsserverip' env var before falling back to 'serverip'
when using the nfs command. Similar to how the 'tftpserverip' env var
is preferred over 'serverip' by the tftp command.
This also updates the error message to closer match the error message
used by the lwIP tftp command when a server ip is not set.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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The DHCP siaddr field contains the IP address of next server to use in
bootstrap. Typically this will be the IP address of a TFTP server or the
IP address of the DHCP server itself.
RFC 2131, 2. Protocol Summary, Page 10:
DHCP clarifies the interpretation of the 'siaddr' field as the
address of the server to use in the next step of the client's
bootstrap process. A DHCP server may return its own address in the
'siaddr' field, if the server is prepared to supply the next
bootstrap service (e.g., delivery of an operating system executable
image). A DHCP server always returns its own address in the 'server
identifier' option.
Set the 'tftpserverip' env variable when the siaddr field contains an
IP address that is different compared to the DHCP server IP address.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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The ip_addr_t of lwIP has support for both IPv6 and IPv4 addresses.
Some lwIP commans is directly accessing the internal addr field of the
ip_addr_t instead of using ipaddr helper functions.
Change to use ipaddr helper functions where appropriate to remove direct
access of the internal addr field. Also change a few instances from ip4
to the version less ipaddr helpers.
There is no intended functional change, besides the change from using
ip4 addr helper to using version less ipaddr helper.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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The lwIP dns command handle env_set() calls from the found callback and
printf() to console in the dns loop. Making it more complex than it
needs to be.
Simplify and ensure any environment variable that is being set is the
same value that would have been printed on console.
There should not be any intended change in behavior, besides the change
from using ip4addr helper to using version less ipaddr helper.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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Use udevice name, similar to other lwip commands, instead of using the
legacy eth_get_name() when printing out the device being used.
Fixes: 230cf3bc2776 ("net: lwip: nfs: Port the NFS code to work with lwIP")
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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The lwIP dns command only prints out cached resolved IP addresses.
When a hostname is first resolved and ERR_INPROGRESS is returned the
dns command prints out 0.0.0.0 instead of the resolved IP address.
Fix this by printing out host_ipaddr instead of the temporary ipaddr
that only is valid when ERR_OK is returned.
Fixes: 1361d9f4f00a ("lwip: dns: do not print IP address when a variable is specified")
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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With the legacy networking stack, it is possible to use USE_SERVERIP,
SERVERIP and BOOTP_PREFER_SERVERIP Kconfg options to force use of a
specific TFTP server ip.
Using the lwIP networking stack use of the 'tftpserverip' environment
variable provide the closest equivalent functionality.
Add USE_TFTPSERVERIP and TFTPSERVERIP Kconfig options that can be used
to add the 'tftpserverip' environment variable to force use of a
specific TFTP server ip.
Signed-off-by: Jonas Karlman <[email protected]>
Acked-by: Jerome Forissier <[email protected]>
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sprintf will write a trailing \0 at the end of the string so when
writing into a buffer, that buffer must be sized to allow for that
trailing zero. In the DHCP code when the index is a number needing two
digits to express the index would use up the two \0 bytes in the buffer
and the trailing \0 from sprintf would be beyond the end of the
allocation. Fix this by adding a third \0 in the buffer.
This was found by code inspection when looking for an issue reported by
Michal Simek, but I do not have the hardware to reproduce, so cannot
confirm if this addresses that issue or not.
Fixes: 98ad145db61a ("net: lwip: add DHCP support and dhcp commmand")
Signed-off-by: Andrew Goodbody <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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sprintf will add a trailing \0 so manually adding a trailing \0 will
result in an extra unaccounted for character being written. This
overwrote the first byte of the following allocation block resulting in
unexpected behavior.
This was found by Running 'pxe get' with no available file resulting in
multiple attempts, using the default algorithm, to attempt to find a file.
Eventually there would be a failed assert when free() was called.
Failing the assert would result in a system reset.
Fixes: 27d7ccda94fa ("net: lwip: tftp: add support of blksize option to client")
Reported-by: Michal Simek <[email protected]>
Tested-by: Michal Simek <[email protected]>
Signed-off-by: Andrew Goodbody <[email protected]>
Tested-by: Tom Rini <[email protected]> # Pine64+
Reviewed-by: Jerome Forissier <[email protected]>
Reviewed-by: Jerome Forissier <[email protected]>
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I will be using my Arm email address for all contributions. Update
MAINTAINERS and .mailmap accordingly.
Signed-off-by: Jerome Forissier <[email protected]>
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Amend code documentation referring to udevice_ops for struct phy_ops
Fixes: 72e5016f878d ("drivers: phy: add generic PHY framework")
Signed-off-by: E Shattow <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-nand-flash
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/29183
This series provides a comprehensive cleanup of the Allwinner (sunxi)
NAND controller drivers and introduces full support for the H6 and H616
SoCs in both the main U-Boot driver and the SPL.
The series successfully deduplicates register maps between sunxi_nand.c
and sunxi_nand_spl.c while migrating to a capability-based architecture.
This approach allows the driver to handle the H616's specific
requirements—such as shifted register offsets for ECC/OOB, the removal
of 512B ECC block support, and mandatory MBUS clock gating—without
breaking compatibility for legacy A10/A23 devices.
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This adds support for the MT8390 EVK board with the following
features enabled/tested: Boot, UART, Watchdog and MMC.
MT8390 is based on MT8188.
Signed-off-by: Julien Masson <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
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Ozan Durgut <[email protected]> says:
This series introduces updates for Analog Devices SC5xx boards.
It cleans up device trees by renaming GPIO expanders and removing
incorrect SPI flash definitions from the common include file.
For the SC598, this series updates the EZLITE board to the latest
Revision E hardware. It also adds missing GPIO hogs and enables
additional commands for the EZKIT configuration.
Link: https://lore.kernel.org/r/[email protected]
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Update the SC598 SOM EZLITE device tree to use the latest revision of
the System on Module (Rev E).
Signed-off-by: Ozan Durgut <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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The current naming convention for GPIO expanders across ADI SC5xx
device trees is inconsistent. This patch updates the node names to
correct indexing and clarify hardware location.
For SC573, SC584, and SC589 evaluation SBCs, switch to zero-based
indexing to align with standard conventions.
For SC594 and SC598 SoM + carrier evaluation kits, rename the nodes to
crr_gpio_expander. This prefix indicates which board the expander is on.
Signed-off-by: Ozan Durgut <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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SPI flash devices are not common across all SC5xx boards. They
already defined in the SoM-specific dtsi files. Keeping the
definition in the common dtsi is therefore incorrect.
Fixes: c9e893d ("board: adi: Add support for SC598")
Signed-off-by: Philip Molloy <[email protected]>
Signed-off-by: Ozan Durgut <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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Add missing GPIO hogs for UART0 enable, UART0 flow control,
SD Card and eMMC control signals.
Fixes: c9e893d ("board: adi: Add support for SC598")
Signed-off-by: Ozan Durgut <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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Enable FAT and GPT support, as well as mtd and wget commands
Signed-off-by: Ozan Durgut <[email protected]>
Reviewed-by: Greg Malysa <[email protected]>
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Ernest Van Hoecke <[email protected]> says:
This is a small, board-specific series for Aquila AM69.
Patch 1 fixes intermittent SPL USB DFU gadget enumeration.
Patch 2 drops a stale MCU_CLKOUT0 enable for ETH_1. V1.1 hardware uses
an external 25 MHz crystal, and support for earlier revisions was
already removed from the DT before upstreaming.
Link: https://lore.kernel.org/r/[email protected]
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On the Toradex Aquila AM69 V1.1, the on-module ETH_1 relies on an
external 25 MHz crystal oscillator. On the V1.0, we needed to enable
MCU_CLKOUT0, but support for this was already dropped from the device
tree before being sent to U-Boot.
Remove this obsolete enabling of MCU_CLKOUT0.
Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support")
Signed-off-by: Ernest Van Hoecke <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
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Around 1 in 20 times, the current R5 SPL fails to pull up the D+ line to
signal that a new USB device (the USB gadget used for downloading the
next stage) joined the bus.
With these strapping options, this is greatly reduced to 1 in thousands.
Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1587424/am69-u-boot-spl-usb-dfu-cdns3-occasionally-fails-to-pull-up-d-in-cdns3_gadget_config
Fixes: 3f0528882c0d ("board: toradex: add aquila am69 support")
Signed-off-by: Ernest Van Hoecke <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
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The H6/H616 boot ROM doesn't expect a SPL scrambled the same way as
older SoCs.
It doesn't use a specific seeds table, it expects a maximized ECC
(BCH-80), a specific BBM (FF000301) and doesn't work if empty pages are
skipped (it needs its specific BBM, even in the padding).
So, add a --soc=h6 option to support H6/616 with:
- more ECC strengths
- specific BBM
- default_scrambler_seeds[] with all values
- no empty pages skip
In Kconfig, select BCH-80 by default for SUNXI_SPL_ECC_STRENGTH to make
BROM happy.
And in scripts/Makefile.xpl, use --soc=h6 option when building for a
SUN50I_GEN_H6 SoC.
Tested on Whatsminer H616 board, booting from NAND.
Reviewed-by: Miquel Raynal <[email protected]>
Co-developed-by: James Hilliard <[email protected]>
Signed-off-by: James Hilliard <[email protected]>
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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The MACRO NFC_PAGE_SHIFT(x) already deals with removing 10 from
nand->page_shift, so it shouldn't be done twice.
Fixes: 4ccae81cdadc ("mtd: nand: Add the sunxi NAND controller driver")
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Fix a cast to pointer from integer warning on ARM64
On 64bits platform, the casts done in {read,write}l() give that kind of
warnings:
drivers/mtd/nand/raw/sunxi_nand_spl.c: In function ‘check_value_inner’:
./arch/arm/include/asm/io.h:110:43: warning: cast to pointer from \
integer of different size [-Wint-to-pointer-cast]
110 | #define __raw_readl(a) (*(volatile unsigned int *)(a))
| ^
[...]
drivers/mtd/nand/raw/sunxi_nand_spl.c:81:27: note: in expansion of \
macro ‘readl’
81 | int val = readl(offset) & expected_bits;
Introduce {read,write}l_nfc inline function to do the right cast and
push the base address (SUNXI_NFC_BASE) into those functions, making the
code more readable.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce H6/H616 NAND controller support for SPL
The H616 NAND controller has the same base as A10/A23, with some
differences:
- MDMA is based on chained buffers
- its ECC supports up to 80bit per 1024bytes
- some registers layouts are a bit different, mainly due do the stronger
ECC.
- it uses USER_DATA_LEN registers along USER_DATA registers.
- it needs a specific clock for ECC and MBUS.
For SPL, most of the work was setting the clocks, adding the new
capability structure for H616 and supporting the new USER_DATA_LEN
registers.
Tested on Whatsminer H616 board (with and without scrambling, ECC)
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce H6/H616 NAND controller support for U-Boot
The H616 NAND controller has the same base as A10/A23, with some
differences:
- MDMA is based on chained buffers
- its ECC supports up to 80bit per 1024bytes
- some registers layouts are a bit different, mainly due do the stronger
ECC.
- it uses USER_DATA_LEN registers along USER_DATA registers.
- it needs a specific clock for ECC and MBUS.
Introduce the basic support, with ECC and scrambling, but without
DMA/MDMA.
Tested on Whatsminer H616 board (with and without scrambling, ECC)
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Add MBUS Master Clock Gating Register for H6 and H616
For H6/H616, the NAND controller needs the MBUS NAND clock along with
CLK_NAND0/1 and CLK_BUS_NAND.
The bit locations are from H6/H616 User Manuals.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Add missing NAND controller-related clock registers
The NAND controller on H6/H616 uses one clock for its internal logic
(NAND0_CLK) and one clock for ECC engine (NAND1_CLK) in addition to AHB
and MBUS clocks.
As NAND{0,1}_CLKs and MBUS_GATE are missing, add them.
The bit locations are from H616/H6 User Manual.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Use generic macros for ECC_MODE and RANDOM_SEED
As H6/H616 registers are different, use more generic macros than hard
coded values specific to A10-like SoC.
No functional changes.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Increase max_oobsize to take into account bigger OOB on 2KiB pages
Some NAND chip (e.g. Kioxia TC58NVG1S3HTA00) have a 2KiB page size +
128 bytes OOB.
In order to detect them, the max_oobsize has to be increased from 64 to
128 bytes.
Tested on Kioxia TC58NVG1S3HTA00 NAND chip on Whatsminer H616 board.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Use defines instead of hardcoded values for NFC_ECC_{ERR_MSK,PAT_FOUND}
SPL is using hard coded values for ECC error detection and empty chunk
detection.
The H6/H616 registers for that have changed, the pattern found is no
more in the NFC_REG_ECC_ST register.
So, don't presume anymore that pattern_found is in NFC_REG_ECC_ST, and
read the pattern_found register to get this information.
Apart from an additional register reading, no functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Introduce NDFC Spare Area Register offset in SoC capabilities
The H6/H616 spare area register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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NFC_RANDOM_{EN,DIRECTION} registers offset moved in H616
Let's make it a SoC capability.
NFC_RANDOM_DIRECTION also moved, but it's unused, just remove it.
No functional change.
Signed-off-by: Richard Genoud <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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