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Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.
Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.
To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Udit Kumar <[email protected]>
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Enable firmware TPM (fTPM) support via OP-TEE for K3 platforms with
MMC hardware. This provides TPM 2.0 functionality through
Microsoft's fTPM Trusted Application running in OP-TEE secure world,
using eMMC RPMB as persistent storage.
fTPM support in U-Boot provides the foundation for measured boot
and disk encryption use cases.
The ARM64 condition ensures these apply only to A53/A72 cores and the
MMC condition ensures fTPM is enabled only on platforms with eMMC
hardware support.
Signed-off-by: Shiva Tripathi <[email protected]>
Acked-by: Andrew Davis <[email protected]>
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We removed configuration symbol CONFIG_DM_PCI with
commit 3232bdf0b30b ("pci: Drop DM_PCI").
Don't select it for TARGET_POMELO.
Fixes: b9d0f00a9d3f ("arm: add initial support for the Phytium Pomelo Board")
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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TARGET namespace is for machines / boards / what-have-you that
building U-Boot for. Simply replace from TARGET to ARCH
make things more clear and proper for ALL SoCFPGA.
Signed-off-by: Brian Sune <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
# Conflicts:
# drivers/ddr/altera/Makefile
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https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Rename freescale to nxp
- Add CPLD support via IFC to the ls1021a-iot board
- Use scmi_clk_state_in_v2 in sandbox
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This patch renames the board directory from board/freescale to
board/nxp because NXP now provides Board Support Packages (BSPs) and
tools for the former Freescale i.MX and other i.MX products.
All relevant references have been updated accordingly. This change does
not affect functionality.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Since the commit 1e24e84db41a ("tiny-printf: Handle formatting of %p
with an extra Kconfig"), SPL_USE_TINY_PRINTF_POINTER_SUPPORT has been
made mandatory in order to use %p which would earlier have defaulted to
a 'long' print.
Without this config symbol, k3_sysfw_dfu_download fails to set the
correct value for the DFU string with:
sprintf(dfu_str, "sysfw.itb ram 0x%p 0x%x", addr,
CONFIG_K3_SYSFW_IMAGE_SIZE_MAX);
The value we get "sysfw.itb ram 0x? 0x41c29d40" causes a boot failure.
Therefore this patch sets SPL_USE_TINY_PRINTF_POINTER_SUPPORT for all K3
devices since the size impact is less than 100 bytes.
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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With commit 5663b137e682 ("arm: Remove edminiv2 board") the last
ARCH_ORION5X platform was removed. Remove the rest of the architecture
code which is now unused.
Reviewed-by: Tony Dinh <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon
We have been getting a lot more patches from Qualcomm engineers, largely
focusing on IoT, router, and automotive platforms (those with QCS, IPQ,
and SA prefixes specifically).
Quite a variety of changes here:
- Watchdog overflow fix
- Hardcoded fastboot buffer addresses for a few board (hoppefully
temporary until fastboot is updated to read $fastboot_addr_r)
- Enable memory protection (MMU_MGPROT) for ARCH_SNAPDRAGON
- pinctrl support for the QCS615 soc
- various USB/phy fixes including phy config for msm8996/qcs615
- mmc and i2c clock configuration fixes
- significant fixes for rpmh and regulator drivers
- added config fragment for pixel devices
- sa8775p clock fixes
- support for "flattened" dwc3 DT that recently landed upstream for
sc7280 (qcs6490) and a few other platforms
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Remove empty gpio.h header file and CONFIG_GPIO_EXTRA_HEADER on
ARCH_MEDIATEK. There is no reason to have these since the header
doesn't contain anything.
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
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Let's enable proper MMU page table protection to properly
protect write-protected and non-executable sections.
Signed-off-by: Neil Armstrong <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Link: https://patch.msgid.link/20251106-topic-snapdragron-en-pgprot-v1-1-d2b9e802230b@linaro.org
Signed-off-by: Casey Connolly <[email protected]>
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These are common for all K3 based boards. Add the common values as
defaults and remove from each board defconfig
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/28119
- New Boards support:
rk3588: MNT Reform2
rk3528: Radxa ROCK 2A/2F
rk3576: ArmSoM Sige1, Luckfox Omni3576, FriendlyElec NanoPi M5,
Radxa ROCK 4D
rk3568: Lunzn FastRhino R66S
- Other board level updates.
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Forcing all those symbols on means we cannot make the binary smaller or
with unnecessary features or drivers disabled. This is especially useful
for security, auditing and certification where less code built means
less to look at (and less surface attack) and less to patch, but also
for making binary images smaller which typically means faster boot.
It is possible to have boards without MMC, NAND or SPI flashes, without
anything on SPI or I2C buses, nothing to control over PWM or GPIO or for
which we have no interest in regulator control or serial output so make
it possible to remove all that if desired.
No intended change in default selected symbols.
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Commit 2a7acc865b9d ("configs: colibri-imx8x: enable RNG support for KASLR")
enables FSL_CAAM which requires initialization in arch_misc_init().
The ARCH_MISC_INIT configuration was added to the relevant defconfig.
Commit d0ed9636902b ("global: Make ARCH_MISC_INIT a selected symbol")
changed ARCH_MISC_INIT to require explicit selection by the developer.
With this change the colibri-imx8x defconfig is no longer sufficient to
enable ARCH_MISC_INIT when FSL_CAAM is selected.
Add the necessary selection to automatically enable ARCH_MISC_INIT when
FSL_CAAM is enabled on i.MX8 platforms.
Fixes: d0ed9636902b ("global: Make ARCH_MISC_INIT a selected symbol")
Signed-off-by: Emanuele Ghidoli <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Convert the PXA1908 platform and its coreprimevelte board to OF_UPSTREAM
and enable the few drivers found in the upstream DTS.
Signed-off-by: Duje Mihanović <[email protected]>
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We have had an implementation of the generic timer found in many v7m
chips since 2017, but as part of the Kconfig migration forgot to allow
it as it wasn't being used at the time. Allow it to be built.
Signed-off-by: Tom Rini <[email protected]>
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This series from Debbie Horsfall <[email protected]> enhances the
Vexpress64 platform in a few ways.
Link: https://lore.kernel.org/r/[email protected]
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Select SYSRESET on Vexpress64 to enable system reset to support other
features, such as capsule-on-disk. Select SYSRESET_PSCI if PSCI is
inferred from the firmware (via ARM_PSCI_FW).
Select ARM_SMCCC for Vexpress64 boards which in turn selects
ARM_PSCI_FW.
The sysreset uclass unconditionally implements a reset_cpu() function.
Remove the empty reset_cpu() in vexpress64 board code.
Signed-off-by: Debbie Horsfall <[email protected]>
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The most of OFFSET values are in hex instead of int which is easier for
layout description.
Signed-off-by: Michal Simek <[email protected]>
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The config "GIC_V3" seems to be typo, and currently "GICV3" remains
disabled. This should be removed until needed.
Fixes: 5cd4a355e0f0 ("board: synquacer: Add DeveloperBox 96boards EE support")
Signed-off-by: Kunihiko Hayashi <[email protected]>
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ARCH_K3 encompasses both 32 and 64-bit cores on the same SoC, though the
DMA addresses are always 64-bit in size.
With the current implementation, the R5 SPL uses a u32 for dma_addr_t
which leads to data overflow when functions such as k3_nav_*_pop_mem try
to write a 64-bit address to dma_addr_t variable.
In certain cases it leads to stack corruption which manifest as boot
failures on certain compilers, such as SPI boot on GCC 14.2 or 13.3.
Therefore this patch selects CONFIG_DMA_ADDR_T_64BIT for all ARCH_K3.
Fixes: ffcc66e8fec5 ("dma: ti: add driver to K3 UDMA")
Signed-off-by: Anshul Dalal <[email protected]>
Reviewed-by: Prasanth Babu Mantena <[email protected]>
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In order to set the BOOTFILE symbol we first need to have USE_BOOTFILE
be set, or some of the logic might not work as expected later on when
building. Second, defaults like this belong with the symbol itself.
Fixes: da595d236b97 ("include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile")
Signed-off-by: Tom Rini <[email protected]>
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Update Kconfig for new platform Agilex7 M-series.
Signed-off-by: Tingting Meng <[email protected]>
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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ATF boot flow (SPL->ATF->U-Boot Proper->OS) boot to OS via kernel.itb file
using bootm command.
Change to use CONFIG_SPL_ATF to differentiate the bootfile of default
environment variable. We shouldn't use CONFIG_FIT because it is enabled
by default for U-Boot Proper.
Signed-off-by: Tingting Meng <[email protected]>
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Put all slave CPUs (CPU1-3) into WFI mode. Master CPU (CPU0) writes
the magic word into system manager's scratch register to indicate
the system has performed L2 reset and request reset manager to
perform hardware handshake and then trigger L2 reset. CPU0 put
itself into WFI mode. L2 reset will reboot all HPS CPU cores after
which all HPS cores are in WFI mode. L2 reset is followed by warm
reset request by SPL via RMR_EL3 system register.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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KASLR, or Kernel Address Space Layout Randomization, is a security
feature in the Linux kernel that randomizes the memory location
where the kernel is loaded during boot.
OP-TEE RNG is a Random Number Generator (RNG) component within the
Open Portable Trusted Execution Environment (OP-TEE) which provides
a random number to U-BOOT and U-BOOT provides this random number
as seed value to the LINUX kernel for KASLR.
Add KASLR OPTEE RNG support across K3 devices by enabling the required
configs.
Signed-off-by: Gokul Praveen <[email protected]>
Reviewed-by: Bryan Brattlof <[email protected]>
Reviewed-by: Manorit Chawdhry <[email protected]>
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This symbol is not something that the user should be enabling or
disabling but rather the developer for a particular board should select
it when required.
This is mostly size neutral, however a few places do have changes. In
the case of i.MX6ULL systems, it is always the case that
arch_misc_init() could call setup_serial_number() and do useful work,
but was not enabled widely, but now is. In the case of i.MX23/28
systems, we should be able to call mx28_fixup_vt() again here, so do so.
Finally, some platforms were calling arch_misc_init() and then not doing
anything and this results in removing the option.
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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With the removal of the last i.MX31 platform we can remove the rest of
the underlying architecture code as well.
Fixes: f247354708ec ("arm: Remove mx31pdk board")
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Peng Fan <[email protected]>
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ft_board_setup_ex()"
João Paulo Gonçalves <[email protected]> says:
In some use cases, board-specific device tree changes must not be overwritten
by system fixups. Although U-Boot provides ft_board_setup_ex() for this
purpose, it is currently only used on TI Keystone. This series makes
ft_board_setup_ex() a generic option, allowing its use by other architectures
and boards.
Additionally, considering that Toradex Verdin-AM62P hardware lifetime
guarantees are based on a 105°C junction temperature (while TI AM62Px supports
up to 125°C), this series implements necessary changes within TI K3 AM62P and
Toradex board code. These changes include exporting common fixup device Tree
functions used in TI K3 for board-code access and also fixup for AM62P thermal
zones to correctly reflect the number of CPU nodes according to the SoC part
number.
Link: https://lore.kernel.org/r/20250623-am62p-fdt-fixup-trip-points-v1-0-12355eb6a72f@toradex.com
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In some use cases, board-specific device tree changes must not be
overwritten by system fixups. Although U-Boot provides
ft_board_setup_ex() for this purpose, it is currently only used on TI
Keystone. Make ft_board_setup_ex() to be a generic option, allowing its
use by other architectures/boards. To maintain backward compatibility,
enable it by default on TI Keystone.
Signed-off-by: João Paulo Gonçalves <[email protected]>
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Ilias Apalodimas <[email protected]> says:
Instructions that lead ito an exception in the hypervisor can't modify two
CPU registers at once for the ARM ISA.
These instructions cannot be emulated by KVM as they do not produce
syndrome information data that KVM can use to infer the destination
register, the faulting address, whether it was a load or store, or
if it's a 32 or 64 bit general-purpose register.
As a result an external abort is injected from QEMU, via ext_dabt_pending.
Link: https://lore.kernel.org/r/[email protected]
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commit 2e2c2a5e72a8 ("arm: qemu: override flash accessors to use virtualizable instructions")
explains why we can't have instructions with multiple output registers
when running under QEMU + KVM and the instruction leads to an exception
to the hypervisor.
USB XHCI is such a case (MMIO) where a ldr w1, [x0], #4 is emitted for
xhci_start() which works fine with QEMU but crashes for QEMU + KVM.
These instructions cannot be emulated by KVM as they do not produce
syndrome information data that KVM can use to infer the destination
register, the faulting address, whether it was a load or store, or
if it's a 32 or 64 bit general-purpose register.
As a result an external abort is injected from QEMU, via ext_dabt_pending
to KVM and we end up throwing an exception that looks like
U-Boot 2025.07-rc4 (Jun 10 2025 - 12:00:15 +0000)
[...]
Register 8001040 NbrPorts 8
Starting the controller
"Synchronous Abort" handler, esr 0x96000010, far 0x10100040
elr: 000000000005b1c8 lr : 000000000005b1ac (reloc)
elr: 00000000476fc1c8 lr : 00000000476fc1ac
x0 : 0000000010100040 x1 : 0000000000000001
x2 : 0000000000000000 x3 : 0000000000003e80
x4 : 0000000000000000 x5 : 00000000477a5694
x6 : 0000000000000038 x7 : 000000004666f360
x8 : 0000000000000000 x9 : 00000000ffffffd8
x10: 000000000000000d x11: 0000000000000006
x12: 0000000046560a78 x13: 0000000046560dd0
x14: 00000000ffffffff x15: 000000004666eed2
x16: 00000000476ee2f0 x17: 0000000000000000
x18: 0000000046660dd0 x19: 000000004666f480
x20: 0000000000000000 x21: 0000000010100040
x22: 0000000010100000 x23: 0000000000000000
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 000000004666f360
Code: d5033fbf aa1503e0 5287d003 52800002 (b8004401)
Resetting CPU ...
There are two problems making this the default.
- It will emit ldr + add or str + add instead of ldr/str(post increment)
in somne cases
- Some platforms that depend on TPL/SPL grow in size enough so that the
binary doesn't fit anymore.
So let's add proper I/O accessors add a Kconfig option
to turn it off by default apart from our QEMU builds.
Reported-by: Mikko Rapeli <[email protected]>
Tested-by: Mikko Rapeli <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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CONFIG_LTO enables Link Time Optimizations that helps in reducing binary
size. The config has been validated on all K3 platforms so can be safely
enabled.
Signed-off-by: Anshul Dalal <[email protected]>
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Enable the workaround for whole snapdragon family.
Suggested-by: Casey Connolly <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: George Chan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Casey Connolly <[email protected]>
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Marek Vasut <[email protected]> says:
Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.
Link: https://lore.kernel.org/r/[email protected]
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Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Add 'imply CONFIG_POSITION_INDEPENTDENT' for QEMU arm arch. This allows
qemu arm boards to load u-boot.bin at any address. It is skipped by
default when u-boot is loaded by either --bios or --kernel.
To load u-boot.bin at a different address, one can use u-boot
chain-loading or qemu loader device[1].
[1] https://www.qemu.org/docs/master/system/generic-loader.html
Signed-off-by: Yang Xiwen <[email protected]>
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Add bloblist support to total_comput platform for passing data
from TF-A using the firmware handoff framework.
Signed-off-by: Jayanth Dodderi Chidanand <[email protected]>
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Select the new MMU_PGPROT Kconfig symbol for all Allwinner board builds,
to use a write-protected .rodata, non-executable .data and .rodata
sections, and non-writable .text sections.
This might trigger runtime exceptions in misbehaving drivers, which
should then be fixed.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
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LMB_ARCH_MEM_MAP is enabled, and lmb_arch_add_memory() is introduced to
correctly handle memory reservations for the second and third DDR
memory banks.
Signed-off-by: Tingting Meng <[email protected]>
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The use of both "imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION" and
"imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE" here is wrong as
those are both part of the same choice statement. Furthermore you cannot
select/imply something from a choice statement, it must be a "default ...
if ..." construct within the choice statement in question.
Signed-off-by: Tom Rini <[email protected]>
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The workaround for the "PSCI bug" on DragonBoard 410c implemented in
arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register
by storing the CurrentEL in there. When running in EL1, the mode switch
sequence implemented there later clears the register again, but this is
skipped when U-Boot is booted in EL2.
This causes crashes in the mach-snapdragon board_fdt_blob_setup() later,
because the invalid address stored in x0 gets dereferenced to check if it
points to a valid DTB.
We can't rely on having a valid values in the CPU registers for the first
stage bootloader configuration on DB410c, and nothing would place a DTB
there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0
hook case to avoid crashing with the clobbered register value.
Fixes: 059d526af312 ("mach-snapdragon: generalise board support")
Signed-off-by: Stephan Gerhold <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by:
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
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This is required for gadget modes to work on most platforms. It must be
disabled for dragonboard410c since that doesn't use dwc3. USB on other
MSM8916 platforms isn't supported by qcom_defconfig anyway.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
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As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In the case of OF_SEPARATE this is
the default so we do not need to do anything here normally to enforce
this.
Signed-off-by: Tom Rini <[email protected]>
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Christian Marangi <[email protected]> says:
This little series adds initial support for Airoha AN7581 SoC.
With the help of some backport patch, this use OF_UPSTREAM
directly.
Posting this to have the targer and the very basic driver.
Ethernet, SNAND and eMMC support is already ready downstream
and will be posted shortly after this gets approved.
Having the first driver ready permits to separately push
dedicate series for SNAND, eMMC and Ethrnet as they all depends
on basic support of clock and reset and nothing else.
Link: https://lore.kernel.org/r/[email protected]
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Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.
Signed-off-by: Christian Marangi <[email protected]>
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Since removing reset_cpu() in mach-snapdragon, all Qualcomm platforms
now depend on CONFIG_SYSRESET and will fail to build without it.
Move the dependency from qcom_defconfig to kconfig so that we use
SYSRESET for all platforms.
Fixes: 61a1a1b8ca73 ("mach-snapdragon: use PSCI sysreset driver")
Signed-off-by: Caleb Connolly <[email protected]>
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Enable PSCI reset driver for Agilex5 cold and warm reset
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Signed-off-by: Tien Fong Chee <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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Status polling is used instead of using interrupt controller for Agilex5.
Disabling GICV3 in Agilex5 target, as well as disabling GICV2 enabled by
default for all SoCFPGA devices.
All the other SoCFPGA devices uses GICV2, thus enabling GICV2 in each of
the devices.
Signed-off-by: Alif Zakuan Yuslaimi <[email protected]>
Signed-off-by: Tien Fong Chee <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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