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The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9
Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.
The two architectures are similar enough that substantial code can be shared.
Signed-off-by: Aneesh V <[email protected]>
Signed-off-by: Steve Sakoman <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands. Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".
This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:
int main (int argc, char **argv)
{
while (--argc > 0 && **++argv == '-') {
/* ====> */ while (*++*argv) {
switch (**argv) {
case 'd':
debug++;
break;
...
default:
usage ();
}
}
}
...
}
The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell. With the modification, the compiler will prevent this with
an
error: increment of read-only location '*argv'
N.B.: The code above can be trivially rewritten like this:
while (--argc > 0 && **++argv == '-') {
char *arg = *argv;
while (*++arg) {
switch (*arg) {
...
Signed-off-by: Wolfgang Denk <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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The push / pop instructions used in this file are available only with
more recent tool chains:
cache.S: Assembler messages:
cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'
Change push/pop into stmfd/ldmfd instructions to support older
versions of binutils as well.
I verified that the modified source code generates exactly the same
binary code.
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Sandeep Paulraj <[email protected]>
Cc: Tom Rix <[email protected]>
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This patch adds support for the EMIF4 interface
available in the AM35x processors.
Signed-off-by: Vaibhav Hiremath <[email protected]>
Signed-off-by: Sanjeev Premi <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Consolidated SDRC related functions into one file - sdrc.c
And also replaced sdrc_init with generic memory init
function (mem_init), this generalization of omap memory setup
is necessary to support the new emif4 interface introduced in AM3517.
Signed-off-by: Vaibhav Hiremath <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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initialized for CS1
From: Vaibhav Hiremath <[email protected]>
The patch makes sure that size for SDRC CS1 gets calculated
only when the CS1 SDRC is initialized.
Signed-off-by: Vaibhav Hiremath <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
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