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This commit moves source files as follows:
arch/arm/cpu/arm920t/at91/* -> arch/arm/mach-at91/arm920t/*
arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/*
arch/arm/cpu/armv7/at91/* -> arch/arm/mach-at91/armv7/*
arch/arm/cpu/at91-common/* -> arch/arm/mach-at91/*
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Andreas Bießmann <[email protected]>
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if CONFIG_AT91SAM9_WATCHDOG is set, do not disable WDT in
SPL
Signed-off-by: Heiko Schocher <[email protected]>
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Signed-off-by: Bo Shen <[email protected]>
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The SAMAA5D4 SoC can access DDR in interleave mode.
Signed-off-by: Bo Shen <[email protected]>
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The SAMA5D4 SoC on chip rc oscillator can not be disabled.
Signed-off-by: Bo Shen <[email protected]>
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Some SoC need to redirect the saic to aic to make the interrupt to
work, here add a weak function to be replaced by real function.
Signed-off-by: Bo Shen <[email protected]>
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Some SoC need to configure the bus matrix, add an weak function
to be replace by real function.
Signed-off-by: Bo Shen <[email protected]>
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add support for using spl code on at91sam9260 and at91sam9g45
based boards.
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Bo Shen <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
[adopt Bo's change in spl.c]
Signed-off-by: Andreas Bießmann <[email protected]>
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- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
in the cr configuration
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
Reviewed-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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use the configure value for computing the ba_off value
not the value from the cr register. This leaded in a
wrong ram configuration on the upcoming corvus spl board
support.
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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We need to make sure the main clock ready field in MCFR is set
after switch to main crystal oscillator.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Rename some defines containing FAT in their name to be filesystem generic:
MMCSD_MODE_FAT => MMCSD_MODE_FS
CONFIG_SPL_FAT_LOAD_ARGS_NAME => CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME => CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION => CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION
Signed-off-by: Guillaume GARDET <[email protected]>
Cc: Tom Rini <[email protected]>
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Commit 41623c9 'arm: move exception handling out of start.S files' missed some
linker scripts. Hence, some boards no longer had exception handling linked since
this commit. Restore the original behavior by adding the .vectors section to
these linker scripts.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
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If without switch to main crystal oscillator, the sama5d3 SoC will
use internal on chip RC oscillator.
In order to get better accuracy, switch to main crystal oscillator.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Add NAND SPL boot support with hardware PMECC.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Add SPI SPL boot support for sama5d3xek board.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Vineet Gupta <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Albert Aribaud <[email protected]>
Acked-by: Tom Rini <[email protected]>
Acked-by: Stefan Roese <[email protected]>
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini <[email protected]>
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This prevents references to _end from generating absolute
relocation records.
This change is binary invariant for ARM targets.
Signed-off-by: Albert ARIBAUD <[email protected]>
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add common phy reset code into a common function.
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Bo Shen <[email protected]>
Cc: Jens Scharsig <[email protected]>
Cc: Sergey Lapin <[email protected]>
Cc: Stelian Pop <[email protected]>
Cc: Albin Tonnerre <[email protected]>
Cc: Eric Benard <[email protected]>
Cc: Markus Hubig <[email protected]>
Acked-by: Jens Scharsig (BuS Elektronik) <[email protected]>
Tested-by: Jens Scharsig (BuS Elektronik) <[email protected]>
Tested-by: Bo Shen <[email protected]>
Acked-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Enable Atmel sama5d3xek boart spl boot support, which can load u-boot
from SD card with FAT file system.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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The MPDDRC supports different type of SDRAM
This patch add ddr2 initialization function
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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