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This commit moves files as follows:
arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/*
arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach-tegra/tegra30/*
arch/arm/cpu/arm720t/tegra114/* -> arch/arm/mach-tegra/tegra114/*
arch/arm/cpu/arm720t/tegra124* -> arch/arm/mach-tegra/tegra124/*
arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/*
arch/arm/cpu/armv7/tegra20/* -> arch/arm/mach-tegra/tegra20/*
arch/arm/cpu/armv7/tegra30/* -> arch/arm/mach-tegra/tegra30/*
arch/arm/cpu/armv7/tegra114/* -> arch/arm/mach-tegra/tegra114/*
arch/arm/cpu/armv7/tegra124/* -> arch/arm/mach-tegra/tegra124/*
arch/arm/cpu/armv7/tegra-common/* -> arch/arm/mach-tegra/*
arch/arm/cpu/tegra20-common/* -> arch/arm/mach-tegra/tegra20/*
arch/arm/cpu/tegra30-common/* -> arch/arm/mach-tegra/tegra30/*
arch/arm/cpu/tegra114-common/* -> arch/arm/mach-tegra/tegra114/*
arch/arm/cpu/tegra124-common/* -> arch/arm/mach-tegra/tegra124/*
arch/arm/cpu/tegra-common/* -> arch/arm/mach-tegra/*
Signed-off-by: Masahiro Yamada <[email protected]>
Tested-by: Simon Glass <[email protected]> [ on nyan-big ]
Cc: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>
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Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
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This reset is required for PCIe and the corresponding ID therefore needs
to be defined. The enumeration value for this was properly defined on
some SoCs but not on others. Similarly, some contained it in the mapping
of peripheral IDs to clock IDs, other didn't. This patch defines it
consistently for all supported SoC generations.
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't support PCIe or SATA.
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1
It has not been tested on Tegra 114 as I don't have that board.
Acked-by: Heiko Schocher <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Conflicts:
drivers/net/Makefile
(trivial merge)
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In 6e7b9f4 some of the debug prints for AES code moved into the generic
code, so we remove these additional calls.
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Tom Warren <[email protected]>
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Tegra's crypto.c uses apply_cbc_chain_data() to sign the warm restart
code. This function was recently moved into the core aes.c and made
static, which prevents the Tegra code from compiling. Make it public
again to avoid the compile errors:
arch/arm/cpu/tegra20-common/crypto.c: In function ‘sign_object’:
arch/arm/cpu/tegra20-common/crypto.c:74:3: warning: implicit declaration of function ‘apply_cbc_chain_data’ [-Wimplicit-function-declaration]
arch/arm/cpu/built-in.o: In function `sign_object':
.../arch/arm/cpu/tegra20-common/crypto.c:74: undefined reference to `apply_cbc_chain_data'
.../arch/arm/cpu/tegra20-common/crypto.c:78: undefined reference to `apply_cbc_chain_data'
Fixes: 6e7b9f4fa0ae ("aes: Move the AES-128-CBC encryption function to common code")
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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This renames all the Tegra20 pinmux pins and functions so they have a
prefix which matches the type name.
The entries in tegra20_pingroups[] are all updated to remove the columns
which are no longer used.
All affected code is updated to match.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
compiles. A separate per-SoC change will be made immediately following,
in order to keep individual patch size down.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the
duplication by creating pinmux-common.c for all the identical code.
This leaves:
* arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of
the various pins/pin groups, drive groups, and mux functions.
* arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table
stating which pin groups support which mux functions.
The code in pinmux-common.c is semantically identical to that in the
various original pinmux.c, but had some consistency and cleanup fixes
applied during migration.
I removed the definition of struct pmux_tri_ctlr, since this is different
between SoCs (especially Tegra20 vs all others), and it's much simpler to
deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c,
and warmboot_avp.c needed updates due to this, since they previously
hijacked this struct to encode the location of some non-pinmux registers.
Now, that code simply calculates these register addresses directly using
simple and obvious math. I like this method better irrespective of the
pinmux code cleanup anyway.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers currently uses struct pmux_tri_ctlr, which is intended to
be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl,
which is intended to be a definition of the miscellaneous registers.
Convert all such code to use struct apb_misc_pp_ctrl, since struct
pmux_tri_ctlr goes away in the next patch.
This requires adding a missing field definition to struct
apb_misc_pp_ctrl, and moving the header into a more common location.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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For consistency with other SoCs, modify Tegra20's enum pmux_func to:
* Remove PMUX_FUNC values that aren't real
* Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0;
this will be assumed by pinmux_set_func() in a future patch.
Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a
private define inside the driver to prevent this from causing compilaton
errors. This will be cleaned up when the pin tables are re-written in a
later patch in this series.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This field isn't used anywhere, so remove it. Note that PIN() macros are
left unchanged for now, to avoid many diffs to them; later commits will
completely rewrite them just one time.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Since Kbuild was introduced, warmboot_avp.o has been compiled
without -march=armv4t.
Makefile should be adjusted to pass a per-file option.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>
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Move the AES-128-CBC encryption function implemented in
tegra20-common/crypto.c into lib/aes.c . This is well re-usable common
code. Moreover, clean the code up a bit and fix the kerneldoc-style
annotations.
Signed-off-by: Marek Vasut <[email protected]>
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Not all code that set or interpreted "mux_bits" was using the named
macros, but rather some was simply using hard-coded integer constants.
This makes it hard to determine which pieces of code are affected by
changes to those constants.
Replace the integer constants with the equivalent macro definitions so
that everything is nicely tied together.
Note that I'm not convinced all the code was using the correct integer
constants, and hence I'm not convinced that all the code is now using
the desired macros. However, this change is a purely mechanical
replacement and should have no functional change. Fixing any bugs will
come later, separately.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Thierry Reding <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Signed-off-by: Masahiro Yamada <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
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T114 needs the SYSCTR0 counter initialized so the TSC can be
read by the kernel. Do it in the bootloader since it's a write-once
deal (secure/non-secure mode dependent).
Signed-off-by: Tom Warren <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
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FUNCMUX_ defines should be named after the pin groups they affect, not
after the module they're muxing onto those pin groups.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c
Some T30 tables needed whitespace fixes due to checkpatch complaints.
Signed-off-by: Tom Warren <[email protected]>
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IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this
synonym and replace with UARTB to disambiguate.
Signed-off-by: Allen Martin <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.
Signed-off-by: Tom Warren <[email protected]>
Reviewed-by: Stephen Warren <[email protected]>
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Add support for a default pin mapping for display1.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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These two functions don't actually modify their arguments so add a const
keyword.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Initialize this variable to avoid a compiler warning about possible
use of uninitialized variable with gcc 4.4.6.
Signed-off-by: Allen Martin <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Tested-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Secondary config for the Flash attachment.
Signed-off-by: Lucas Stach <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Common practice on Tegra 2 boards is to use the pllp_out4 FO
to generate the ULPI reference clock. For this to work we have
to override the default hardware generated output divider.
This function adds a clean way to do so.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Most Tegra boards output the ULPI reference clock on pad DEV2.
Complete the periph_id enum so that we are able to enable this
clock output circuit.
Signed-off-by: Lucas Stach <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren <[email protected]>
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patches.
Move files that are going to be common between T20 and T30 into 'tegra-common'
subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any
files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs
and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a
follow-on patch.
Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.
Signed-off-by: Tom Warren <[email protected]>
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Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.
Upcoming Tegra30 port will use common code/defines/names where possible.
Signed-off-by: Tom Warren <[email protected]>
Acked-by: Stephen Warren <[email protected]>
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Add selection of NAND flash pins to the funcmux.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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These flags were necessary when building tegra20 as a single binary
that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support
is split into a separate SPL, this is no longer necessary.
Signed-off-by: Allen Martin <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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In preparation for splitting out the armv4t code from tegra20, move
the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
Signed-off-by: Allen Martin <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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