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Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.
This change is also coherent with the structure in kernel.
Signed-off-by: Stefano Babic <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: Akshay Bhat <[email protected]>
CC: Ken Lin <[email protected]>
CC: Marek Vasut <[email protected]>
CC: Heiko Schocher <[email protected]>
CC: "Sébastien Szymanski" <[email protected]>
CC: Christian Gmeiner <[email protected]>
CC: Stefan Roese <[email protected]>
CC: Patrick Bruenn <[email protected]>
CC: Troy Kisky <[email protected]>
CC: Nikita Kiryanov <[email protected]>
CC: Otavio Salvador <[email protected]>
CC: "Eric Bénard" <[email protected]>
CC: Jagan Teki <[email protected]>
CC: Ye Li <[email protected]>
CC: Peng Fan <[email protected]>
CC: Adrian Alonso <[email protected]>
CC: Alison Wang <[email protected]>
CC: Tim Harvey <[email protected]>
CC: Martin Donnelly <[email protected]>
CC: Marcin Niestroj <[email protected]>
CC: Lukasz Majewski <[email protected]>
CC: Adam Ford <[email protected]>
CC: "Albert ARIBAUD (3ADEV)" <[email protected]>
CC: Boris Brezillon <[email protected]>
CC: Soeren Moch <[email protected]>
CC: Richard Hu <[email protected]>
CC: Wig Cheng <[email protected]>
CC: Vanessa Maegima <[email protected]>
CC: Max Krummenacher <[email protected]>
CC: Stefan Agner <[email protected]>
CC: Markus Niebel <[email protected]>
CC: Breno Lima <[email protected]>
CC: Francesco Montefoschi <[email protected]>
CC: Jaehoon Chung <[email protected]>
CC: Scott Wood <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Anatolij Gustschin <[email protected]>
CC: Simon Glass <[email protected]>
CC: "Andrew F. Davis" <[email protected]>
CC: "Łukasz Majewski" <[email protected]>
CC: Patrice Chotard <[email protected]>
CC: Nobuhiro Iwamatsu <[email protected]>
CC: Hans de Goede <[email protected]>
CC: Masahiro Yamada <[email protected]>
CC: Stephen Warren <[email protected]>
CC: Andre Przywara <[email protected]>
CC: "Álvaro Fernández Rojas" <[email protected]>
CC: York Sun <[email protected]>
CC: Xiaoliang Yang <[email protected]>
CC: Chen-Yu Tsai <[email protected]>
CC: George McCollister <[email protected]>
CC: Sven Ebenfeld <[email protected]>
CC: Filip Brozovic <[email protected]>
CC: Petr Kulhavy <[email protected]>
CC: Eric Nelson <[email protected]>
CC: Bai Ping <[email protected]>
CC: Anson Huang <[email protected]>
CC: Sanchayan Maity <[email protected]>
CC: Lokesh Vutla <[email protected]>
CC: Patrick Delaunay <[email protected]>
CC: Gary Bisson <[email protected]>
CC: Alexander Graf <[email protected]>
CC: [email protected]
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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At present CONFIG_CMD_SATA enables the 'sata' command which also brings
in SATA support. Some boards may wish to enable SATA without the command.
Add a separate CONFIG to permit this.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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There is no dedicated reset signal wired up for the MX6QDL thus if the
bootloader enables the link we need some special handling to get the core
back into a state where it is safe to touch it for configuration.
While there has been some special handling in the Linux kernel to do this,
it was removed in 4.11 thus we need to do it properly in the bootloader
and therefore without this if you enable PCI in the bootloader you will hang
while booting the 4.11 kernel.
This puts the PCIe controller back into a safe state for the kernel driver
before launching the kernel.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Tested-by: Peter Senna Tschudin <[email protected]>
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This converts the following to Kconfig:
CONFIG_CMD_HDMIDETECT
Note that we cannot do 'default y if VIDEO' because this option is only
enabled for a small subset of mx6 boards. Also this command is is not a
great implementation (it doesn't use driver model).
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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When unlock, if caller is not the sema owner,
return -EACCES, not 1.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Drop the unneeded code. lib/time.c use timebase_l/h.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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This converts the following to Kconfig:
CONFIG_CMD_DEKBLOB
Note: This option does not seem to actually be enabled by any board.
Signed-off-by: Simon Glass <[email protected]>
[trini: imply under SECURE_BOOT for mx5/6/7]
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_CMD_BMODE
Signed-off-by: Simon Glass <[email protected]>
[trini: Make this default y and depend on mx5/6/7]
Signed-off-by: Tom Rini <[email protected]>
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Instead of initializing 'struct src' to SRC_BASE_ADDR on
every function better to have global define macro.
Reviewed by: Stefano Babic <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Use meaningful macros IMX6_BMODE_*, instead of numerical
number in boot mode detection code.
Cc: Tim Harvey <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.
Cc: Tim Harvey <[email protected]>
Reviewed by: Stefano Babic <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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For i.MX6, the bootmode determine code is part of spl_boot_device,
but there is might be a possibility for other part the code need to
check the desired boot mode for adding new functionalities like
modeboot env variable, or changing boot order etc.
So introduced imx6_src_get_boot_mode which actually reading the
boot mode register for desired modes.
More cleanup will be add in future patches.
Cc: Stefano Babic <[email protected]>
Cc: Tim Harvey <[email protected]>
Cc: Matteo Lisi <[email protected]>
Cc: Michael Trimarchi <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Add CAAM clock functions, SEC_CONFIG[1] fuse checking, and default CSF
size for HAB support boot on mx7ulp.
Users need to uncomment the CONFIG_SECURE_BOOT in mx7ulp_evk.h to build
secure uboot.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Reviewed-by : Stefano Babic <[email protected]>
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Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Cc: Stefano Babic <[email protected]>
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In some cases this is absolutely required, so select this for some secure
features. This also requires migration of RSA_FREESCALE_EXP
Cc: Ruchika Gupta <[email protected]>
Cc: Poonam Aggrwal <[email protected]>
Cc: Naveen Burmi <[email protected]>
Cc: Po Liu <[email protected]>
Cc: Shengzhou Liu <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Sumit Garg <[email protected]>
Cc: Shaohui Xie <[email protected]>
Cc: Chunhe Lan <[email protected]>
Cc: Feng Li <[email protected]>
Cc: Alison Wang <[email protected]>
Cc: Mingkai Hu <[email protected]>
Cc: York Sun <[email protected]>
Cc: Saksham Jain <[email protected]>
Cc: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Before commit 81c4eccb55cc ("imx: mx6: fix USB bmode to use
reserved value") a non-reserved value has been used to trigger
Serial Downloader using bmode, which translated to a GPR9 value
of 0x10. However, on some boards the non-reserved value lead to
unreliable bmode command. With the above mentioned commit, U-boot
switched to use [7:4] b0001, which translates to GPR9 0x10 for
Serial Downloader mode. Check for the new value and classify it
as Serial Downloader mode.
Signed-off-by: Stefan Agner <[email protected]>
CC: Stefano Babic <[email protected]>
CC: Tim Harvey <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: Eric Nelson <[email protected]>
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With entry_point now being an unsigned long we need to adapt the last
two debug prints to use %lX not %X.
Fixes: 11e1479b9e67 ("SPL: make struct spl_image 64-bit safe")
Signed-off-by: Tom Rini <[email protected]>
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To being able to sign created binaries, we need to know the HAB Blocks
for that image. Especially for the imximage type the HAB Blocks are
only available during creation of the image. We want to preserve the
information until we get to sign the files.
In the verbose case we still get them printed out instead of writing
to log files.
Cc: [email protected]
v2-Changes:
- No usage of MKIMAGEOUTPUT_$(@F) macro.
- Predefine default value /dev/null in every involved Makefile.
Signed-off-by: Sven Ebenfeld <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
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When using HAB as secure boot mechanism on Wandboard, the chain of
trust breaks immediately after the SPL. As this is not checking
the authenticity of the loaded image before jumping to it.
The HAB status output will not be implemented in SPL as it adds
a lot of strings that are only required in debug cases. With those
it exceeds the maximum size of the available OCRAM (69 KiB).
The SPL MISC driver support must be enabled, so that the driver can use OTP fuse
to check if HAB is enabled.
Cc: [email protected]
v2-Changes: None
Signed-off-by: Sven Ebenfeld <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
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These files are blowing up the SPL and should not be required
there as the SPL delivers no command console. Because building fails
for mx27 and mx31 machines with SPL build, we remove the linker flag
for them from the Makefile. Nothing is built for them to be linked
in that directory.
Cc: [email protected]
v2 Changes:
- Remove mx27 and mx31 from Makefile during SPL build as nothing is built for
them in that directory. And removing the commands with the libs-y directive
lead to linker failures. e.g. "armv5te-ld.bfd: cannot find arch/arm/imx-common/built-in.o: No such file or directory)"
Signed-off-by: Sven Ebenfeld <[email protected]>
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
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If L2 cache configured as OCRAM, reset it.
Switch to use runtime check.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Add iomux settings for i.MX6 SLL
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye.Li <[email protected]>
Cc: Stefano Babic <[email protected]>
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Add i.MX6 SLL GPT timer support.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Add i.MX6SLL cpu type.
MXC_CPU_MX6D is not a real value in chip, so change it to 0x6A.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Commit 54e4fcfa3c749a78 ("ARM: mx6: add MMC2 boot device detection
support in SPL") prevents UDOO neo board to boot:
Trying to boot from MMC2
port 1
MMC Device 1 not found
spl: could not find mmc device. error: -19
SPL: failed to boot from all boot devices
This reverts commit 54e4fcfa3c749a789192e83740a53234182f4ca3.
Signed-off-by: Breno Lima <[email protected]>
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The ipu has two display interfaces. Make the used one a parameter
in struct display_info_t instead of using unconditionally DI0.
DI0 is the default setting.
Signed-off-by: Max Krummenacher <[email protected]>
Reviewed-by: Eric Nelson <[email protected]>
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Check BOOT_CFG2[3:4] to determine which SD/MMC port is selected to boot
from. If MMC2 is selected return BOOT_DEVICE_MMC2. In all other cases
return BOOT_DEVICE_MMC1, as we do not have corresponding macro for MMC3
and MMC4.
Signed-off-by: Marcin Niestroj <[email protected]>
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If CONFIG_USE_IMXIMG_PLUGIN is selected, plugin.bin will be
generated under board/$(BOARDDIR)/.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Introduce USE_IMXIMG_PLUGIN Kconfig
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This commit "2bb014820c49a63902103bac710bc86b5772e843"
do some clean up to use the code in lib/time.c.
But usec2ticks is still being used by security related job ring code.
Bring back the function to avoid build break when CONFIG_FSL_CAAM
is defined.
The computation logic has been changed, using 64-bit variable
to ease the process, making it work on older (MX5) platforms.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Troy Kisky <[email protected]>
Signed-off-by: Gary Bisson <[email protected]>
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So the option can easily be selected through menuconfig.
Signed-off-by: Gary Bisson <[email protected]>
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SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module,
not in IOMUXC, so correct the related registers' offset.
Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate
them from iomuxc pins.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: "Benoît Thébaudeau" <[email protected]>
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Since the mx6ull adds the AIPS3, so enable its initialization.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Cc: Stefano Babic <[email protected]>
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The i.MX6ULL's GPT supportting taking OSC as clock source.
Add i.MX6ULL support.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Add i.MX6ULL major cpu type.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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The CPU detection macro is_mx6dq returns 0 on an i.MX6DQP, so we need to
check for it explicitly in order to correctly initialize the pads when
CONFIG_MX6QDL is defined.
Signed-off-by: Filip Brozovic <[email protected]>
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Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.
<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <[email protected]>
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <[email protected]>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <[email protected]>
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Fix a number of typos, including:
* "compatble" -> "compatible"
* "eanbeld" -> "enabled"
* "envrionment" -> "environment"
* "FTD" -> "FDT" (for "flattened device tree")
* "ommitted" -> "omitted"
* "overriden" -> "overridden"
* "partiton" -> "partition"
* "propogate" -> "propagate"
* "resourse" -> "resource"
* "rest in piece" -> "rest in peace"
* "suport" -> "support"
* "varible" -> "variable"
Signed-off-by: Robert P. J. Day <[email protected]>
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The SPL code already knows which boot device it calls the spl_boot_mode()
on, so pass that information into the function. This allows the code of
spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
board_boot_order() correctly alter the behavior of the boot process.
The later one is important, since in certain cases, it is desired that
spl_boot_device() return value be overriden using board_boot_order().
Signed-off-by: Marek Vasut <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
[add newly introduced zynq variant]
Signed-aff-by: Andreas Bießmann <[email protected]>
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To i.MX6DQPlus, osc can be choosed as the source of gpt, so
add i.MX6DQPlus support in gpt_has_clk_source_osc.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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The i.MX6DQPlus support sata interface, we should not
return failure when CPU is i.MX6DQPlus.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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Support i.MX6DQPlus, otherwise wrong hab address will be used
for i.MX6QDPlus.
Signed-off-by: Peng Fan <[email protected]>
Cc: Ulises Cardenas <[email protected]>
Cc: Stefano Babic <[email protected]>
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Use simpler runtime cpu dection macros.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Bhuvanchandra DV <[email protected]>
Cc: "Benoît Thébaudeau" <[email protected]>
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Add i.MX6SOLO support for hab function.
The difference between i.MX6SOLO and i.MX6DL is
the number of CPU cores. Besides this, they work
the same.
Signed-off-by: Peng Fan <[email protected]>
Cc: Bhuvanchandra DV <[email protected]>
Cc: "Benoît Thébaudeau" <[email protected]>
Cc: Stefano Babic <[email protected]>
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According to the product website, the full names are i.MX 7Solo
and i.MX 7Dual, whereas the short form is i.MX7S and i.MX7D. Be
consistent and print the short form for both supported i.MX 7 SoCs.
Signed-off-by: Stefan Agner <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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According PL310 TRM, Auxiliary Control Register
"
The register must be written to using a secure access, and it can be
read using either a secure or a NS access. If you write to this register
with a NS access, it results in a write response with a DECERR response,
and the register is not updated. Writing to this register with the L2
cache enabled, that is, bit[0] of L2 Control Register set to 1,
results in a SLVERR.
"
So If L2 cache is already enabled by ROM, chaning value of ACR
will cause SLVERR and uboot hang.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
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We need to be passing -T firmware here and aren't.
Signed-off-by: Tom Rini <[email protected]>
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The echo -ne "\xNN" does not work in certain bourne-compatible shells, like
dash. The recommended way of hex->char conversion is using printf(1), but
there is a pitfall here. The GNU printf does support "\xNN" format, but
according to the opengroup documentation, this is not part of POSIX. The
POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of
compatibility, we use that.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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Read the number of cores in the fuses to distinguish between
the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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