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Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.
By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.
Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.
Reviewed-by: Anshul Dalal <[email protected]>
Tested-by: Michal Simek <[email protected]> # Versal Gen 2 Vek385
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
Tested-by: Christophe Leroy (CS GROUP) <[email protected]>
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As exposed by "make randconfig", we have an issue with the dependencies
for REGMAP (and xPL variants). As this is a library function, it should
always be selected and not depended on by other functionality. This is
largely done correctly today, so just correct the few outliers.
Acked-by: Anshul Dalal <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.
To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha EN7523 SoC.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.
To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha AN7581 SoC.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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Basic support for en7523/en7529/en7562 SoCs. Within a patch
only serial console will be supported.
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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Partly revert commit 726404a66c773 ("airoha: rework RAM size handling
to support multiple RAM size").
The general idea is good, but the call of
get_ram_size((void *)gd->ram_base, SZ_8G);
produces the following result on my an7581 board with only 1Gb of
memory:
"Synchronous Abort" handler, esr 0x96000004
elr: 0000000081e201c8 lr : 0000000081e20160 (reloc)
elr: 00000000bff501c8 lr : 00000000bff50160
x0 : 0000000180000000 x1 : 0000000100000000
x2 : 000000000000002e x3 : 0000000000000002
x4 : 000000001fbf0000 x5 : 0060000000000401
x6 : 0000000000000000 x7 : 00000000bffdb268
x8 : 0000000000000060 x9 : 00000000bffdb2c8
x10: 0000000000000000 x11: 0000000000000060
x12: 00000000bffdb268 x13: 00000000841c56d0
x14: 00000000841c56d0 x15: 0000000000000000
x16: 00000000841506e4 x17: dd7fe29aec3b07e8
x18: 00000000bf710e00 x19: 0000000080000000
x20: 0000000000000000 x21: 0000000020000000
x22: 0000000200000000 x23: 0000000000000001
x24: 0000000040000000 x25: 00000000bf708e78
x26: 00000000bf7bdca0 x27: 0000000000000000
x28: 0000000000000000 x29: 00000000bf708e20
Code: 910943ff d65f03c0 d37df2a1 8b150e60 (f8616a62)
Resetting CPU ...
So just not call get_ram_size() and use the value from dtb.
Fixes: 726404a66c773 ("airoha: rework RAM size handling to support multiple RAM size")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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This partly fix commit 726404a66c773 ("airoha: rework RAM size handling
to support multiple RAM size")
The function get_effective_memsize() do not see non-global defines
of CFG_MAX_MEM_MAPPED, so the effective memory size will not be changed.
Fix the issue by putting definition of CFG_MAX_MEM_MAPPED to the proper
place.
Fixes: 726404a66c773 ("airoha: rework RAM size handling to support multiple RAM size")
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
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There are multiple version of the same reference board with different
RAM size and it's not enough to base the RAM size entirely from DT. To
better support it use the get_ram_size way to scan for the actual RAM
size of Airoha SoC and increase the size of the memory map.
Also rework the memory map to account for 2 memory map. The first one of
2GB for 32bit DMA and for safe usage of U-Boot. The second one for the
rest of the RAM since up to 8GB are supported.
Reviewed-by: Mikhail Kshevetskiy <[email protected]>
Signed-off-by: Christian Marangi <[email protected]>
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According to include/sysreset.h the reset_cpu() function does not take any args
Signed-off-by: Mikhail Kshevetskiy <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Add initial support for Airoha AN7581 SoC. This adds the initial Kconfig
and Makefile entry for the SoC, an U-Boot specific DTSI and initial config
for it. Also add the initial code for CPU and RAM initialization.
Signed-off-by: Christian Marangi <[email protected]>
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