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Age	Commit message (Expand)	Author
2026-03-17	eeprom: starfive: Simplify get_ddr_size_from_eeprom()	Hal Feng
2025-02-03	riscv: cpu: jh7110: fallback to generic cleanup_before_linux()	Yao Zi
2024-12-18	riscv: cpu: jh7110: Sort the list of imply statements	Hal Feng
2024-12-18	dts: starfive: Switch to using upstream DT	Hal Feng
2024-10-11	arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD	Simon Glass
2024-05-02	board: starfive: Rename spl_soc_init() to spl_dram_init()	Lukas Funke
2023-10-24	riscv: Remove common.h usage	Tom Rini
2023-09-05	riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT	Shengyu Qu
2023-08-15	common: return type board_get_usable_ram_top	Heinrich Schuchardt
2023-08-10	riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE	Shengyu Qu
2023-08-10	riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation	Shengyu Qu
2023-08-10	riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE	Minda Chen
2023-07-12	riscv: Rename SiFive CLINT to RISC-V ALINT	Bin Meng
2023-07-12	ram: starfive: Read memory size information from EEPROM	Yanhong Wang
2023-04-20	riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC	Yanhong Wang
2023-04-20	riscv: cpu: jh7110: Add support for jh7110 SoC	Yanhong Wang