u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author
2025-10-16	Revert "riscv: Add a Zalrsc-only alternative for synchronization in start.S"	Yao Zi
2025-09-19	riscv: Add a Zalrsc-only alternative for synchronization in start.S	Yao Zi
2025-03-13	spl: Use CONFIG_VAL() to obtain the SPL stack	Simon Glass
2025-03-13	spl: Add an SPL_HAVE_INIT_STACK option	Simon Glass
2024-10-11	arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD	Simon Glass
2024-05-30	riscv: remove cache enablement in start.S	Leo Yu-Chi Liang
2024-04-09	riscv: add backtrace support	Ben Dooks
2023-10-24	riscv: Remove common.h usage	Tom Rini
2023-08-10	riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation	Shengyu Qu
2023-07-24	riscv: setup per-hart stack earlier	Bo Gan
2023-04-20	riscv: spl: Remove relocation sections	Bin Meng
2023-04-20	riscv: Avoid updating the link register	Bin Meng
2023-04-20	riscv: Change to use positive offset to access relocation entries	Bin Meng
2023-04-20	riscv: Optimize loading relocation type	Bin Meng
2023-04-20	riscv: Optimize source end address calculation in start.S	Bin Meng
2022-09-26	riscv: Introduce AVAILABLE_HARTS	Rick Chen
2022-09-26	spl: introduce SPL_XIP to config	Nikita Shubin
2022-08-11	riscv: ae350: Fix XIP config boot failure	Leo Yu-Chi Liang
2022-08-11	riscv: cpu: set gp before board_init_f_init_reserve	Nikita Shubin
2022-06-06	Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h	Tom Rini
2021-10-18	riscv: Remove OF_PRIOR_STAGE from RISC-V boards	Ilias Apalodimas
2021-05-05	riscv: cpu: Add callback to init each core	Green Wan
2020-12-14	riscv: fix the wrong swap value register	Brad Kim
2020-09-30	riscv: Add some comments to start.S	Sean Anderson
2020-09-30	riscv: Ensure gp is NULL or points to valid data	Sean Anderson
2020-09-30	riscv: Consolidate fences into AMOs for available_harts_lock	Sean Anderson
2020-09-30	Revert "riscv: Clear pending interrupts before enabling IPIs"	Sean Anderson
2020-07-24	riscv: Fix linking error when building u-boot-spl with no SMP support	Leo Yu-Chi Liang
2020-07-01	riscv: Clear pending interrupts before enabling IPIs	Sean Anderson
2020-04-23	riscv: Provide a mechanism to fix DT for reserved memory	Atish Patra
2020-04-23	riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL	Bin Meng
2020-04-23	riscv: Merge unnecessary SMP ifdefs in start.S	Bin Meng
2020-02-10	riscv: Remove unnecessary instruction	Sean Anderson
2020-01-17	common: Move relocate_code() to init.h	Simon Glass
2019-12-10	riscv: add option to wait for ack from secondary harts in smp functions	Lukas Auer
2019-12-10	riscv: Fix clear bss loop in the start-up code	Rick Chen
2019-09-03	riscv: update fix_rela_dyn	Marcus Comstedt
2019-08-26	riscv: support SPL stack and global data relocation	Lukas Auer
2019-08-26	riscv: add SPL support	Lukas Auer
2019-08-26	riscv: add run mode configuration for SPL	Lukas Auer
2019-08-15	riscv: Access CSRs using CSR numbers	Bin Meng
2019-05-09	riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...	Rick Chen
2019-05-09	riscv: Introduce CONFIG_XIP to support booting from flash	Rick Chen
2019-04-08	riscv: hang if relocation of secondary harts fails	Lukas Auer
2019-04-08	riscv: do not rely on hart ID passed by previous boot stage	Lukas Auer
2019-04-08	riscv: add support for multi-hart systems	Lukas Auer
2019-04-08	riscv: save hart ID in register tp instead of s0	Lukas Auer
2019-04-08	riscv: delay initialization of caches and debug UART	Lukas Auer
2018-12-18	riscv: Save boot hart id to the global data	Bin Meng
2018-12-18	riscv: Move trap handler codes to mtrap.S	Bin Meng