u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author
2023-10-04	configs: andes: add vender prefix for target name	Randolph
2023-10-02	Merge branch 'next'	Tom Rini
2023-09-20	riscv: dts: starfive: generate u-boot-spl.bin.normal.out	Heinrich Schuchardt
2023-09-05	riscv: jh7110: enable riscv,timer in the device tree	Torsten Duwe
2023-08-10	riscv: dts: starfive: Enable pcie0 dts node	Minda Chen
2023-08-02	riscv: dts: starfive: Enable PCIe host controller	Mason Huo
2023-07-24	riscv: dts: jh7110: Add clock source from PLL	Xingyu Wu
2023-07-24	riscv: dts: jh7110: Add PLL clock controller node	Xingyu Wu
2023-07-12	riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board	Yixun Lan
2023-07-12	riscv: dts: starfive: Add support eeprom device tree node	Yanhong Wang
2023-07-12	riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B	Yanhong Wang
2023-07-12	riscv: dts: jh7110: Add ethernet device tree nodes	Yanhong Wang
2023-07-06	riscv: dts: sync mpfs-icicle devicetree with linux	Conor Dooley
2023-07-06	riscv: dts: drop microchip from dts filenames	Conor Dooley
2023-04-20	riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree	Yanhong Wang
2023-04-20	riscv: dts: jh7110: Add initial u-boot device tree	Yanhong Wang
2023-04-20	riscv: dts: jh7110: Add initial StarFive JH7110 device tree	Yanhong Wang
2023-02-27	Merge tag 'v2023.04-rc3' into next	Tom Rini
2023-02-17	riscv: binman: Add help message for missing blobs	Rick Chen
2023-02-17	riscv: Rename Andes cpu and board names	Leo Yu-Chi Liang
2023-02-17	riscv: ae350: dts: Update L2 cache compatible string	Yu Chien Peter Lin
2023-02-14	dm: dts: Convert driver model tags to use new schema	Simon Glass
2022-11-15	riscv: dts: fix the mpfs's reference clock frequency	Conor Dooley
2022-11-03	riscv: dts: Add QSPI NAND device node	Padmarao Begari
2022-11-03	riscv: dts: Update memory configuration	Padmarao Begari
2022-11-03	riscv: Rename Andes PLIC to PLICSW	Yu Chien Peter Lin
2022-10-31	Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE	Simon Glass
2022-09-06	riscv: dts: sifive: Synchronize FU740 and Unmatched DT	Icenowy Zheng
2022-09-06	dt-bindings: clock: sifive: sync FU740 PRCI clock binding header	Icenowy Zheng
2022-09-05	riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux	Jessica Clarke
2022-03-15	k210: dts: align plic node with Linux	Niklas Cassel
2022-03-15	k210: dts: align fpioa node with Linux	Damien Le Moal
2022-03-15	k210: dts: add missing power bus clocks	Damien Le Moal
2022-03-15	k210: use the board vendor name rather than the marketing name	Damien Le Moal
2022-02-09	dts: automatically build necessary .dtb files	Rasmus Villemoes
2021-12-23	riscv: qemu: Split devicetree files for qemu_riscv32/64	Simon Glass
2021-12-02	riscv: Support booting SiFive Unmatched from SPI.	Thomas Skibo
2021-12-02	riscv: dts: Split Microchip device tree	Padmarao Begari
2021-10-18	riscv: Remove OF_PRIOR_STAGE from RISC-V boards	Ilias Apalodimas
2021-07-21	board: sifive: drop stuff related to unmatched revision 1	Zong Li
2021-07-07	riscv: dts: add OpenPiton RISC-V board dts support	Tianrui Wei
2021-07-06	riscv: dts: add dts for unmatched rev1	Zong Li
2021-07-06	riscv: sifive: fu740: Support i2c in spl	Zong Li
2021-07-06	board: riscv: add openpiton-riscv64 SoC support	Tianrui Wei
2021-06-28	Merge tag 'v2021.07-rc5' into next	Tom Rini
2021-06-17	k210: dts: Set PLL1 to the same rate as PLL0	Sean Anderson
2021-06-17	riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config	Bin Meng
2021-06-17	riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit	Bin Meng
2021-06-17	riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes	Bin Meng
2021-06-17	riscv: ae350: dts: Remove the unnecessary space in bootargs	Bin Meng