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AgeCommit message (Expand)Author
2023-08-02acpi: Add missing RISC-V acpi_table headerHeinrich Schuchardt
2023-07-12riscv: Rename SiFive CLINT to RISC-V ALINTBin Meng
2023-07-12eeprom: starfive: Enable ID EEPROM configurationYanhong Wang
2023-07-06riscv: define test_and_{set,clear}_bit in asm/bitops.hBen Dooks
2023-07-06riscv: implement local_irq_{save,restore} macrosBen Dooks
2023-07-06riscv: add generic link for <asm/atomic.h>Ben Dooks
2023-07-06cmd/sbi: display new extensionsHeinrich Schuchardt
2023-06-19common: spl: Add spl NVMe boot supportMayuresh Chitale
2023-05-31include: Remove unused header filesTom Rini
2023-04-20riscv: Correct a comment in io.hBin Meng
2023-04-20riscv: cpu: jh7110: Add support for jh7110 SoCYanhong Wang
2023-02-17riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()Yu Chien Peter Lin
2023-02-17riscv: global_data.h: Correct the comment for PLICSWYu Chien Peter Lin
2023-01-20global: Finish CONFIG -> CFG migrationTom Rini
2022-12-08arch/riscv: add semihosting support for RISC-VKautuk Consul
2022-11-03riscv: Rename Andes PLIC to PLICSWYu Chien Peter Lin
2022-09-26riscv: Introduce AVAILABLE_HARTSRick Chen
2022-09-26spl: introduce SPL_XIP to configNikita Shubin
2022-07-07Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to KconfigTom Rini
2022-05-26riscv: Clean up asm/io.hLeo Yu-Chi Liang
2022-05-26riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.hMichal Simek
2022-04-06riscv: provide missing base extension functionsHeinrich Schuchardt
2022-04-06cmd: sbi: add Performance Monitoring Unit ExtensionHeinrich Schuchardt
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass
2022-01-19doc: replace @return by Return:Heinrich Schuchardt
2021-11-08riscv: add #define in asm/io.h for some device driversWei Fu
2021-11-08riscv: function to retrieve SBI implementation versionHeinrich Schuchardt
2021-10-20riscv: Avoid io read/write cause wrong resultNick Hu
2021-10-07sysreset: provide SBI based sysreset driverHeinrich Schuchardt
2021-10-07riscv: add missing SBI extension definitionsHeinrich Schuchardt
2021-09-07riscv: lib: modify the indentZong Li
2021-09-07board: sifive: use ccache driver instead of helper functionZong Li
2021-07-06board: sifive: Add an interface to get PCB revisionZong Li
2021-05-31riscv: cpu: fu740: Add support for cpu fu740Green Wan
2021-05-17riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng
2021-04-22lmb: move CONFIG_LMB in KconfigPatrick Delaunay
2021-04-08riscv: assembler versions of memcpy, memmove, memsetHeinrich Schuchardt
2021-02-03riscv: Change phys_addr_t and phys_size_t to 64-bitBin Meng
2021-01-18riscv: Add DMA 64-bit address supportPadmarao Begari
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass
2020-09-30riscv: Use a valid bit to ignore already-pending IPIsSean Anderson
2020-09-30riscv: Rework Andes PLMT as a UCLASS_TIMER driverSean Anderson
2020-09-14riscv: define function set_gd()Heinrich Schuchardt
2020-08-25cmd: provide command sbiHeinrich Schuchardt
2020-08-14riscv: sifive/fu540: spl: Rename soc_spl_init()Bin Meng
2020-08-14riscv: Call spl_board_init_f() in the generic SPL board_init_f()Bin Meng
2020-08-04sifive: reset: add DM based reset driver for SiFive SoC'sSagar Shrikant Kadam
2020-07-06Merge branch 'next'Tom Rini
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel
2020-07-01riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson