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The U_BOOT_DRIVER macro creates a list of drivers used at link time, and
all entries here must be unique. This in turn means that all entries in
the code should also be unique in order to not lead to build failures
later with unexpected build combinations. Typically, the problem we have
here is when a driver is obviously based on another driver and didn't
update this particular field and so while the name field reflects
something unique the linker entry itself is not. In a few places this
provides a more suitable string name as well, however.
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Svyatoslav Ryhel <[email protected]> # Tegra
Reviewed-by: Peter Robinson <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Prepare v2026.04-rc3
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Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.
Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.
Reviewed-by: Patrice Chotard <[email protected]> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <[email protected]> #TI boards
Acked-by: Yao Zi <[email protected]> #TH1520
Signed-off-by: Peng Fan <[email protected]>
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This commit updates the RAM region filtering logic in
board_get_usable_ram_top() to skip any memory regions whose start address
is above 4GB. Previously, only the end address was capped at 4GB, but
regions entirely above this threshold were still considered.
Typically, the following memory map entries would cause
board_get_usable_ram_top() to return 0x100000000, which is incorrect.
start=00000000, end=00001000, type=16
start=00001000, end=000a0000, type=1
start=000a0000, end=000f6000, type=2
start=000f6000, end=000f7000, type=16
start=000f7000, end=00100000, type=2
start=00100000, end=6f170000, type=1
start=6f170000, end=70000000, type=16
start=70000000, end=80800000, type=2
start=e0000000, end=f8000000, type=2
start=fa000000, end=fc000000, type=2
start=fc800000, end=fc880000, type=2
start=fd800000, end=fe800000, type=2
start=feb00000, end=feb80000, type=2
start=fec00000, end=fed00000, type=2
start=fed20000, end=fed80000, type=2
start=feda1000, end=feda2000, type=2
start=fedc0000, end=fede0000, type=2
start=100000000, end=102400000, type=2
start=102400000, end=47f800000, type=1
start=4000000000, end=4020000000, type=2
By adding a check to continue the loop if the region's start address
exceeds 0xffffffffULL, the function now properly ignores regions that are
not usable in 32-bit address space.
Signed-off-by: Jeremy Compostella <[email protected]>
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When compiled with FTRACE=1 U-boot will crash as %rdi is clobbered
in board_init_f_alloc_reserve() and board_init_f_init_reserve() will
memset the .text segment instead of the global_data struct.
According to the System V AMD64 ABI %rdi is not preserved and the
existing code only worked as board_init_f_alloc_reserve() was small
enough to not use %rdi.
Fix that by always passing the correct argument to
board_init_f_init_reserve().
TEST=Can boot on qemu-q35 with FTRACE=1 enabled during build.
Signed-off-by: Patrick Rudolph <[email protected]>
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With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Rewrite the '.rel.dyn' (u-boot.lds) to follow modern practices, and
include the 8-byte alignment at the end of the section.
- Expands the '.dynamic' section (u-boot-64.lds) to be more readable
when adding a second statement to the section.
- Aligns the final section before _end (for U-Boot) or _image_binary_end
or __bss_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to
the final section before the symbol or changing an existing ALIGN(4)
statement.
- Ensure that we do have alignment by adding an ASSERT so that when not
aligned we fail to link (and explain why).
Signed-off-by: Tom Rini <[email protected]>
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The generic name 'EFI' would be more useful for common EFI features. At
present it just refers to the EFI app and stub, which is confusing.
Rename it to EFI_CLIENT
Signed-off-by: Simon Glass <[email protected]>
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Move this so we can include it from sandbox, needed since it is in a
bloblist and must have a check.
Signed-off-by: Simon Glass <[email protected]>
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The end-at-4gb property implies a value for skip-at-start so add it into
the output FDT so that U-Boot can read it.
Now that skip-at-start is implemented, we can drop the workarounds used
in the x86 code to obtain the correct image-pos value.
Signed-off-by: Simon Glass <[email protected]>
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As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case, we move to having a
"default FSP_VERSION2 if INTEL_APOLLOLAKE" in order to get the desired
outcome.
Signed-off-by: Tom Rini <[email protected]>
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Tom Rini <[email protected]> says:
This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.
Link: https://lore.kernel.org/r/[email protected]
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It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.
Signed-off-by: Tom Rini <[email protected]>
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Heinrich Schuchardt <[email protected]> says:
Introduce a new function to update ACPI table headers.
This allows to simplify the existing code.
Link: https://lore.kernel.org/r/[email protected]
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Use acpi_update_checksum() for updating ACPI table header checksum.
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
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As both CONFIG_X86_RUN_64BIT and X86_RUN_64BIT_NO_SPL cases run U-Boot
in 64-bit mode with the CPU fully initialized already.
Signed-off-by: Jeremy Compostella <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This commit introduces a new configuration option X86_RUN_64BIT_NO_SPL
to allow building U-Boot as a 64-bit binary without using the SPL
(Secondary Program Loader). The motivation is to simplify the boot
process for certain x86-based platforms that do not require SPL, such as
those booting directly from a 64-bit coreboot firmware.
This update revises the `X86_RUN_64BIT` configuration to more accurately
describe its role as "32-bit SPL followed by 64-bit U-Boot." It
clarifies the sequence of operations during the boot process, where the
system transitions from a 32-bit SPL (Secondary Program Loader) to the
main 64-bit U-Boot.
Signed-off-by: Jeremy Compostella <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The existing QEMU implementation mostly ignored BLOBLIST_TABLES and
allocates the bulk of the tables with malloc(). Update it to place all
tables in the bloblist. Since QEMU declares a size of 128KB regardless
of the size of its tables, this requires a larger bloblist.
Fix up the e820 table to handle this, keeping the old code as an option
for now, to assist with any future bug-fixing.
Signed-off-by: Simon Glass <[email protected]>
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Move over to use this API before making the code even more complicated.
Signed-off-by: Simon Glass <[email protected]>
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QEMU likes to have an MTRR set up, just like real machines. Add an MTRR
which covers the total RAM size.
This does nothing on machines without MTRRs.
Signed-off-by: Simon Glass <[email protected]>
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At present mtrr_add_request() requires that the size is a power of two.
This is too limiting for machines with 4GB (or more) of RAM, since they
often must take account of a memory hole at 3GB.
Update the function to automatically deal with an unaligned size, using
more MTRRs as required.
The algorithm is taken from coreboot commit 60bce10750
Signed-off-by: Simon Glass <[email protected]>
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Rather than repeating the same code in several places, add some
functions which can do the conversion.
Use the cpu_phys_address_size() function to obtain the physical-address
size, since it is more reliable with kvm, where the host CPU may have a
different value from the emulation CPU.
Signed-off-by: Simon Glass <[email protected]>
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At present it is not possible to find out the physical-address size in
long mode, so a predefined value is used.
Update the macros to support this properly, since it is important when
programming MTRRs.
Signed-off-by: Simon Glass <[email protected]>
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This value happens to be used by ctype.h so chose a different name.
Signed-off-by: Simon Glass <[email protected]>
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With the 64-bit descriptor we can use a jump instruction, rather than
pushing things on the stack.
Since the processor is in 64-bit mode by this point, pop a 64-bit value
from the stack, containing the target address.
This simplifies the code slightly, in particular its use of the stack.
Signed-off-by: Simon Glass <[email protected]>
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Make use the existing GDT which now includes entries for 64-bit code.
Leave the interrupt descriptors alone. They can be tidied up once U-Boot
starts up.
With this, kvm mode works with QEMU.
Signed-off-by: Simon Glass <[email protected]>
Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/31
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This is required as part of the procedure. The existing code works
because it changes the GDT at the same time, but this makes kvm
unhappy.
Update the algorithm to disable and then re-enable paging.
Signed-off-by: Simon Glass <[email protected]>
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Use a symbol to select the size of the GDT, rather than hard-coding a
value. This matches how it is done in start64
Signed-off-by: Simon Glass <[email protected]>
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Use some named flags when setting up the cache, so it is easier to see
what is going on.
Signed-off-by: Simon Glass <[email protected]>
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At present it is not possible to execution 64-bit code without
installing an entire new Global Descriptor Table. This is inconvenient
since kvm does not seem to like switching into long mode with a new
table.
It isn't actually necessary, since we can just extend the existing
table. Add some new entries to this effect.
Signed-off-by: Simon Glass <[email protected]>
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BSS is placed in DRAM which is actually available early with QEMU. But
it is cleared by the init sequence, so values stored there are lost.
Move the system-type flag into a function, instead.
Signed-off-by: Simon Glass <[email protected]>
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When a section is not flagged with SHF_ALLOC, LLD's --gc-sections
algorithm fails to visit the sections that it references. As a result of
this, LLD was dropping the call64.o(.data) section, which is itself only
referenced by .text_call64.
This appears to be a bug in LLD, but the .section directive for
.text_call64 should really have the correct flags either way.
Add `"ax"` to mark the section as ALLOC ("supposed to be loaded") and
CODE ("supposed to be executed").
Fixes: 7dc82591d68e2a ("x86: Move call64 into its own section")
Signed-off-by: Sam Edwards <[email protected]>
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With a recent Binman change, the skip-at-start property is now honoured,
meaning that all image-pos values in the affected section start from
the skip-at-start value.
The x86 code works around the old behaviour at present, so update it.
Signed-off-by: Simon Glass <[email protected]>
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This breaks chromebook_coral which says:
Video: No video mode configured in FSP!
This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8.
Signed-off-by: Simon Glass <[email protected]>
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Patrick Rudolph <[email protected]> says:
Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.
The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.
The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.
The changes were tested on real hardware as well on QEMU v9.0:
qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
-pflash secure-world.rom \
-pflash unsecure-world.rom
qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic
Tested against FWTS V24.03.00.
Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
Linux kernel module doesn't support ACPI yet.
Link: https://lore.kernel.org/r/[email protected]
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The FADT structure found in U-Boot represents FADT revision 6 and the
GICC and GICD structures defined in U-Boot are based on ACPI revision
6.3.
Bump the table revision to fix FWTS failures seen on aarch64.
Signed-off-by: Patrick Rudolph <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
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Write MADT in common code and let the SoC fill out the body by
calling acpi_fill_madt() which must be implemented at SoC level.
Signed-off-by: Patrick Rudolph <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
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Write the FADT in common code since it's used on all architectures.
Since the FADT is mandatory all SoCs or mainboards must implement the
introduced function acpi_fill_fadt() and properly update the FADT.
Signed-off-by: Patrick Rudolph <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
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Without asm/cpu_x86.h inclusion a compiler is not happy:
arch/x86/cpu/cpu_x86.c:14:5: warning: no previous prototype for ‘cpu_x86_bind’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:29:5: warning: no previous prototype for ‘cpu_x86_get_vendor’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:41:5: warning: no previous prototype for ‘cpu_x86_get_desc’ [-Wmissing-prototypes]
arch/x86/cpu/cpu_x86.c:55:5: warning: no previous prototype for ‘cpu_x86_get_count’ [-Wmissing-prototypes]
Add missing header inclusion.
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Some functions are not used anywhere except the same file
where they are defined. Mark them static. This helps avoiding
the compiler warnings:
arch/x86/cpu/cpu.c:343:6: warning: no previous prototype for ‘detect_coreboot_table_at’ [-Wmissing-prototypes]
arch/x86/cpu/mtrr.c:90:6: warning: no previous prototype for ‘mtrr_write_all’ [-Wmissing-prototypes]
arch/x86/cpu/i386/interrupt.c:240:6: warning: no previous prototype for ‘__do_irq’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Most of the copies of the print_cpuinfo() call the default method.
Remove all of those in order to have only the default one when
no `cpu` command is compiled.
This also helps avoiding compiler warning, e.g.:
arch/x86/cpu/tangier/tangier.c:23:5: warning: no previous prototype for ‘print_cpuinfo’ [-Wmissing-prototypes]
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Receiving timestamps from coreboot was unceremoniously dropped some time
ago. Add it back.
Signed-off-by: Simon Glass <[email protected]>
Fixes: 8ad01ce36f7 ("x86: Remove x86 specific GD flags as they are...")
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Rather than using a special variable, get the timestamp info from the
coreboot sysinfo struct. Return a proper error as well.
Signed-off-by: Simon Glass <[email protected]>
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When bootstage is used the timer can be inited before the CPU identity
is set up, resulting in the checks for the vendor not working.
Add a special call to work around this.
Signed-off-by: Simon Glass <[email protected]>
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Refactor the cpu code and use it to show the CPU vendor, e.g.
AuthenticAMD or GenuineIntel
Signed-off-by: Simon Glass <[email protected]>
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While a few SoCs have a unique print_cpuinfo function, a number of them
just use default_print_cpuinfo. Make default_print_cpuinfo have a weak
alias to provie print_cpuinfo.
Signed-off-by: Tom Rini <[email protected]>
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Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.
Update the comment in bootstage to refer to this symbol, instead of
SPL_
Signed-off-by: Simon Glass <[email protected]>
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Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.
Signed-off-by: Simon Glass <[email protected]>
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Use the new symbol to refer to any 'SPL' build, including TPL and VPL
Signed-off-by: Simon Glass <[email protected]>
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Rename this function to indicate that it refers to any xPL phase.
Signed-off-by: Simon Glass <[email protected]>
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Philip Oberfichtner <[email protected]> says:
This patch series implements the dwc_eth_qos glue driver for Intel SOCs.
Before doing that, a few general adaptions to the dwc_eth_qos.c main
driver are required. Most notably, the preparation for PCI based driver
instances, which do not necessarily use a device tree.
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