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Add bb_miiphy_bus function for designware bitbang feature.
Signed-off-by: Jim Liu <[email protected]>
Signed-off-by: Michael Chang <[email protected]>
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Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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Older DesignWare Ethernet MAC versions that this driver supports can
only work with 32-bit DMA source/destination addresses. Some platforms
have no physical RAM at the lowest 4GB address space. For these
platforms the driver must translate DMA addresses to/from physical
memory addresses.
Call translation routines so that properly configured platforms can use
the DesignWare Ethernet MAC. For platforms using device-tree this
usually means adding dma-ranges property to the bus the device node is
in.
Signed-off-by: Baruch Siach <[email protected]>
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At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code.
Signed-off-by: Tom Rini <[email protected]>
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This value is always used at the default, rename it for now. This
likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini <[email protected]>
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Replace reference to the correct name STMicroelectronics
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <[email protected]>
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Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.
Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.
Signed-off-by: Simon Glass <[email protected]>
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At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.
Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.
Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.
This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Export all functions so that drivers can use them, or not, as the need
arises.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.
Signed-off-by: Sjoerd Simons <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Commit 90b7fc924adf "net: designware: support phy reset device-tree
bindings" made DW GMAC driver dependent on DM_GPIO by unconditional
usage of purely DM_GPIO stuff like:
* dm_gpio_XXX()
* gpio_request_by_name()
But since that driver as of today might be easily used without
DM_GPIO (that's the case for Synopsys AXS10x boards) we're
shielding all DM_GPIO things by ifdefs.
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Beniamino Galvani <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Sjoerd Simons <[email protected]>
Cc: Sonic Zhang <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.
Signed-off-by: Beniamino Galvani <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[trini: Use phys_addr_t not unsigned long long to test that we're within
DMA'able memory]
Signed-off-by: Tom Rini <[email protected]>
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Add support for the snps,reset-gpio, snps,reset-active-low (optional) and
snps,reset-delays-us device-tree bindings. The combination of these
three define how the PHY should be reset to ensure it's in a sane state.
Signed-off-by: Sjoerd Simons <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This property allows to specify fastest connection mode supported by
the MAC (as opposed to features of the phy).
There are situations when phy may handle faster modes than the
MAC (or even it's particular implementation or even due to CPU being too
slow).
This property is a standard one in Linux kernel these days and some
boards do already use it in their device tree descriptions.
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Sonic Zhang <[email protected]>
cc: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add driver model support to the designware driver. This reuses most of the
existing code except for some duplication in the probe() method.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Board can define its own AXI burst length to improve DWMAC DMA performance.
v2-changes:
- Avoid write burst len register when the Macro is not defined.
v3-changes:
- Add axi_bus register member to struct eth_dma_regs.
Signed-off-by: Sonic Zhang <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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The correct value for this setting can vary across SoCs and boards, so make it
configurable.
Also reduce the default value to 8, which is the same default as used in the
Linux driver.
Signed-off-by: Ian Campbell <[email protected]>
Cc: Alexey Brodkin <[email protected]>
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On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote:
> The {r,t}xbuffs fields also need to be aligned. Previously this was done
> implicitly because they immediately followed the descriptor tables. Make this
> explicit and also move to the head of the struct.
Looks like I managed to not actually commit the move of the field to the
head of the struct! v3.1 follows....
Ian.
8<------------
>From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001
From: Ian Campbell <[email protected]>
Date: Thu, 1 May 2014 19:45:15 +0100
Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more
efficiently.
The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could
be 256 or even larger. That means there is a potentially huge hole in the
struct before those fields, so move them to the front where they are better
packed.
Moving them to the front also helps ensure that so long as dw_eth_dev is
properly aligned (which it is since "net/designware: ensure device private data
is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids
having to worry too much about compiler specifics.
The {r,t}xbuffs fields also need to be aligned. Previously this was done
implicitly because they immediately followed the descriptor tables. Make this
explicit and also move to the head of the struct.
Signed-off-by: Ian Campbell <[email protected]>
Cc: Alexey Brodkin <[email protected]>
Tested-by: Siarhei Siamashka <[email protected]>
Reviewed-by: Siarhei Siamashka <[email protected]>
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It's important to have ability to flush/invalidate each DMA buffer descriptor
individually to prevent incoherency of adjacent BDs.
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Vineet Gupta <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Vipin Kumar <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Shiraz Hashim <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Amit Virdi <[email protected]>
Cc: Sonic Zhang <[email protected]>
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With this change driver will benefit from existing phylib and thus
custom phy functionality implemented in the driver will go away:
* Instantiation of the driver is now much shorter - 2 parameters
instead of 4.
* Simplified phy management/functoinality in driver is replaced with
rich functionality of phylib.
* Support of custom phy initialization is now done with existing
"board_phy_config".
Note that after this change some previously used config options
(driver-specific PHY configuration) will be obsolete and they are simply
substituted with similar options of phylib.
For example:
* CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
by default.
* CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
automatically the first discovered on MDIO bus phy will be used
I believe there's no need now in "doc/README.designware_eth" because
user only needs to instantiate the driver with "designware_initialize"
whose prototype exists in "include/netdev.h".
Cc: Joe Hershberger <[email protected]>
Cc: Vipin Kumar <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Mischa Jonker <[email protected]>
Cc: Shiraz Hashim <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Amit Virdi <[email protected]>
Cc: Sonic Zhang <[email protected]>
Signed-off-by: Alexey Brodkin <[email protected]>
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It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.
If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.
Commit ef76025a99247cdb8f927a2c9f15400678dfb599 "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.
Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.
Signed-off-by: Alexey Brodkin <[email protected]>
Patch: 277902
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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This patch adds the following changes to designware ethernet driver
found on the ST SPEAr SoC:
- Don't init MAC & PHY upon startup. This causes a delay, waiting for
the auto negotiation to complete. And we don't want this delay to
always happen. Especially not on platforms where ethernet is not
used at all (e.g. booting via flash).
Instead postpone the MAC / PHY configuration to the stage, where
ethernet is first used.
- Add possibility for board specific PHY init code. This is needed
for example on the X600 board, where the Vitesse PHY needs to be
configured for GMII mode.
This board specific PHY init is done via the function
designware_board_phy_init(). And this driver now adds a weak default
which can be overridden by board code.
- Use common functions miiphy_speed() & miiphy_duplex() to read
link status from PHY.
- Print status and progress of auto negotiation.
- Print link status (speed, dupex) upon first usage.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Amit Virdi <[email protected]>
Cc: Vipin Kumar <[email protected]>
Cc: Joe Hershberger <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Few Designware peripheral registers need to be modified based on the
ethernet interface selected by the board. This patch supports interface
information in ethernet driver
Signed-off-by: Vipin Kumar <[email protected]>
Signed-off-by: Amit Virdi <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.
This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.
Signed-off-by: Vipin Kumar <[email protected]>
Signed-off-by: Amit Virdi <[email protected]>
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The max frame length for normal descriptor can be 0x7FF i.e 2047. It was wrongly
specified as 2048. Currently, the max descriptor length is around 1500, so
redefining the mask to 1600
Signed-off-by: Vipin Kumar <[email protected]>
Signed-off-by: Amit Virdi <[email protected]>
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Designware network driver support added.
This is a Synopsys ethernet controller
Signed-off-by: Vipin Kumar <[email protected]>
Signed-off-by: Ben Warren <[email protected]>
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