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1. Add optional serdes-supply regulator property support.
2. Enable 10Gbps feature for the controller, configure netc blkctrl
CFG_LINK_PCS_PROT_2 to 10G SXGMII.
3. Add internal xpcs phy initialization to 10G XGMII Mode without
auto-negotiation interface.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
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i.MX95 uses enetc version 4.1 controller. Update the enetc for i.MX95.
Add ARM-specific cache handling and i.MX95 specific register layout
handling.
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Clean up
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
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The verdor ID and device ID of i.MX95 EMDIO are different from LS1028A
EMDIO, so add new vendor ID and device ID to pci_device_id table to
support i.MX95 EMDIO.
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Marek Vasut <[email protected]> # Clean up
Signed-off-by: Ye Li <[email protected]>
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Introduce driver data for each PCI device. The driver data carry
offsets of registers which differ between different SoCs.
Signed-off-by: Marek Vasut <[email protected]>
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Split register accessors to the port base/station interface/port/mac
registers as those are at different offsets on different SoCs. This
is a preparatory patch which will allow addition of adjusted offsets
for new SoCs easily.
Signed-off-by: Marek Vasut <[email protected]>
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Move register accessors from header files and turn them into proper
inline functions, so typechecking can be done on them. Drop no longer
enetc_port_regs() and unused enetc_read() and enetc_bdr_read().
Signed-off-by: Marek Vasut <[email protected]>
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Use the word 'uclass' instead of 'if_type' to complete the conversion.
Signed-off-by: Simon Glass <[email protected]>
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The RGMII spec supports optional in-band status reporting for the speed
and duplex negotiated on the copper side, and the ENETC driver enables
this feature by default.
However, this does not work when the PHY does not implement the in-band
reporting, or when there is a MAC-to-MAC connection described using a
fixed-link. In that case, it would be better to disable the feature in
the ENETC MAC and always force the speed and duplex to the values that
were negotiated and retrieved over MDIO once the autoneg is finished.
Since this works always, we just do it unconditionally and drop the
in-band code.
Note that because we need to wait for the autoneg to complete, we need
to move enetc_setup_mac_iface() after phy_startup() returns, and then
pass the phydev pointer all the way to enetc_init_rgmii().
The same considerations have led to a similar Linux driver patch as well:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c76a97218dcbb2cb7cec1404ace43ef96c87d874
Signed-off-by: Vladimir Oltean <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.
Signed-off-by: Alex Marginean <[email protected]>
Signed-off-by: Claudiu Manoil <[email protected]>
Signed-off-by: Vladimir Oltean <[email protected]>
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Move this uncommon header out of the common header.
Signed-off-by: Simon Glass <[email protected]>
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Passes on the primary address used by u-boot to Linux. The code does a DT
fix-up for ENETC PFs and sets the primary MAC address in IERB. The address
in IERB is restored on ENETC PCI functions at FLR.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Reviewed-by: Priyanka Jain <[email protected]>
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Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.
Signed-off-by: Alex Marginean <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC. This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions. Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.
Signed-off-by: Catalin Horghidan <[email protected]>
Signed-off-by: Alex Marginean <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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