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Add PHY driver for Multi-Protocol PHY present on Renesas R-Car X5H
R8A78000 SoC. Currently, the PHY driver only supports configuring
the MPPHY for ethernet operation.
Signed-off-by: Thanh Quan <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Hai Pham <[email protected]> #Fix License-Identifier
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Clean up macros, indent, clock and reset handling in probe,
rename the driver and add r8a78000- into compatible string,
update commit message.]
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Add support for the Ethernet Physical Coding Sublayer (PCS) controller
on R-Car Gen5 SoCs, specifically the Renesas R-Car X5H R8A78000.
The controller is based on the SERDES infrastructure used in previous
R-Car generations, with updates for Gen5 register layout and features.
Because majority of this driver is SoC-specific register programming,
the majority of this driver is different enough from R8A779F0 SerDes
driver to justify its own driver. Deduplication of the remaining bits
of code does not yield any improvement.
Signed-off-by: Hai Pham <[email protected]>
Signed-off-by: Phong Hoang <[email protected]>
Signed-off-by: Tam Nguyen <[email protected]>
Signed-off-by: Thanh Quan <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[Marek: Add missing clk_bulk_disable() in fail path.
Drop always-true aneg_on setting.
Reduce poll delay from 100s to 100ms.
Use bulk reset operations to finalize reset handling.]
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Add Renesas Ethernet SERDES driver for R-Car S4-8 (r8a779f0).
The datasheet describes initialization procedure without any information
about registers' name/bits. So, this is all black magic to initialize
the hardware. Especially, all channels should be initialized at once.
This driver is imported and adjusted from Linux 6.3-rc1 commit:
50133cd3e8dd1 ("phy: renesas: r8a779f0-eth-serdes: Remove retry code in .init()")
Signed-off-by: Marek Vasut <[email protected]>
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