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As exposed by "make randconfig", we have an issue with the dependencies
for PINCTRL_TH1520. It really needs to depend on PINCTRL_GENERIC rather
than select it, and PINCTRL_GENERIC in turn already depends on
PINCTRL_FULL.
Signed-off-by: Tom Rini <[email protected]>
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This driver adds the base support of pinctrl over SCMI. The driver
does two main things. First, it allows you to configure the initial
pin states. Secondly, it's used a base to build a GPIO driver on
top of it.
To configure the states then add a pinmux config to the scmi_pinctrl
section:
scmi_pinctrl: protocol@19 {
reg = <0x19>;
pinmux1: pinmux_test {
pinmux = <0 1 0xFFFFFFFF 18 1
0 2 0xFFFFFFFF 18 1
0 3 0xFFFFFFFF 18 1>;
function = "f_gpio1";
groups = "grp_1", "grp_3";
};
};
Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing. However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server. The
numbers are: selector, identifier, function_id, config_type, and
config_value. In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.
Signed-off-by: Dan Carpenter <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Although the pinctrl pm requests are implemented in the PMU firmware,
PM_QUERY_DATA is actually implemented in ATF. In SPL (or when running in
EL3), ATF is not yet running, so we need to implement this API
ourselves. Do the bare minimum, allowing SPL to enumerate functions, but
don't bother with groups. Groups take up a lot of space, and can be
emulated with pins. For example, a node like
display-port {
mux {
groups = "dpaux0_1";
function = "dpaux0";
};
};
can be replaced by
display-port {
mux {
pins = "MIO34", "MIO35", "MIO36", "MIO37";
function = "dpaux0";
};
};
While this isn't backwards-compatible with existing devicetrees, it's
more than enough for SPL where we may only need to mux one or two pins.
Add SPL_PINCTRL_ZYNQMP to ensure there's no SPL size growth when pinctrl
is enabled in U-Boot but isn't necessary for SPL. The only config this
would affect is Kria, but SPL_PINCTRL_GENERIC is disabled so
SPL_PINCTRL_ZYNQMP is not selected.
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The devm alloc functions that we have may follow the Linux kernel model
where allocations are (almost always) automatically free()'d. However,
quite often we don't enable, in full U-Boot, the tracking and free()'ing
functionality. This in turn leads to memory leaks because the driver
author expects that since the functions have the same name as in the
Linux Kernel they have the same behavior. In turn we then get
functionally correct commits such as commit 00e1fed93c8c ("firmware:
ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually
add these calls. Rather than manually tracking allocations and
implementing free()s, rework things so that we follow expectations by
enabling the DEVRES functionality (outside of xPL phases).
This turns DEVRES from a prompted symbol to a symbol that must be
select'd, and we now remove our non-managed alloc/free functions from
outside of xPL builds.
Reviewed-by: Michael Trimarchi <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.
Signed-off-by: Tom Rini <[email protected]>
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The SoC pads of TH1520 are separated into three groups (AP 1, AP 2 and
AON) controlled by independent pin controllers. This patch ports their
driver from Linux kernel with most code for setting pinconf and pinmux
kept as is.
The dt-binding of TH1520 pin controller uses a schema where pins to
configure are specfied as strings and looked up at runtime, which the
generic pinctrl helpers of U-Boot cannot parse, thus a customized
set_state() callback is implemented to parse pinconfig nodes and setup
the configuration.
Signed-off-by: Yao Zi <[email protected]>
Acked-by: Leo Yu-Chi Liang <[email protected]>
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implement a driver to use semtech pinctrl and
gpio expander, this driver is adapted from a
existent linux driver that is written by
Gregory Bean <[email protected]>.
Signed-off-by: Anis Chali <[email protected]>
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This adds support for pin configuration on the Analog Devices SC5XX SoC
family. This commit is largely a port of the Linux driver, which has not
yet been submitted upstream.
Co-developed-by: Nathan Barrett-Morrison <[email protected]>
Signed-off-by: Nathan Barrett-Morrison <[email protected]>
Co-developed-by: Ian Roberts <[email protected]>
Signed-off-by: Ian Roberts <[email protected]>
Signed-off-by: Vasileios Bimpikas <[email protected]>
Signed-off-by: Utsav Agarwal <[email protected]>
Signed-off-by: Arturs Artamonovs <[email protected]>
Signed-off-by: Oliver Gaskell <[email protected]>
Signed-off-by: Greg Malysa <[email protected]>
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A later commit will make use of the pinctrl driver in TPL so let's add
the ability to build the Rockchip pinctrl driver in TPL.
Reviewed-by: Paul Kocialkowski <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.
Reviewed-by: Sumit Garg <[email protected]>
Signed-off-by: Caleb Connolly <[email protected]>
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The existing pinctrl driver available for Tegra SOC is well
designed, but it lacks DM support. Let's add a DM compatible
overlay, which allows use of the device tree, along with preserving
backward compatibility with all existing setups and the ability
to use it in SPL board configuration stage.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
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Add pinctrl driver for StarFive JH7110 SoC.
Signed-off-by: Kuan Lim Lee <[email protected]>
Signed-off-by: Emil Renner Berthing <[email protected]>
Signed-off-by: Jianlong Huang <[email protected]>
Signed-off-by: Yanhong Wang <[email protected]>
Tested-by: Conor Dooley <[email protected]>
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Replace reference to the correct name STMicroelectronics
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add Nuvoton BMC NPCM750 Pinmux and Pinconf support.
Signed-off-by: Jim Liu <[email protected]>
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Add VPL versions of commonly used Kconfig options.
Signed-off-by: Simon Glass <[email protected]>
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A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.
The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
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Create a do-nothing driver for each sunxi pin controller variant.
Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Add pinctrl driver for Xilinx ZynqMP SOC. This driver is compatible with
linux device tree parameters for configuring pinmux and pinconf.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/2d7eefa83c8c0129f7243a25de56a289e948f6c6.1645626183.git.michal.simek@xilinx.com
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This driver supports both pin muxing and GPIO support for the
pin control logic found on Apple SoCs.
Signed-off-by: Mark Kettenis <[email protected]>
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This driver uses Pinctrl framework and is compatible with the Linux
driver for AST2600.
Signed-off-by: Ryan Chen <[email protected]>
Signed-off-by: Dylan Hung <[email protected]>
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fix typo in pinctrl Kconfig file to avoid git commit failure on
some commit hooks check.
Signed-off-by: Yuan Fang <[email protected]>
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The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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add DM support for parallel I/O ports on QUICC Engine Block
Signed-off-by: Heiko Schocher <[email protected]>
Patch-cc: Mario Six <[email protected]>
Patch-cc: Qiang Zhao <[email protected]>
Patch-cc: Holger Brunck <[email protected]>
Series-changes: 2
- remove RFC
- fixed Codingstyle errors, therefore new patch
powerpc, mpc83xx: fix codingstyle issues for qe_io.c
- moved DM part to drivers/pinctrl
Commit-notes:
Open questions / discussion:
- I let the old none DM based implementation in code
so boards should work with old implementation.
This should be removed if all boards are converted to
DM/DTS.
- Unfortunately linux DTS does not use "pinctrl-"
properties, instead "pio-handle" properties.
Even worser old U-Boot code initializes all pins
defined in "const qe_iop_conf_t qe_iop_conf_tab[]"
table in board code. As linux does the same I decided
to also scan through all subnodes containing "pio-map"
property and initialize them too.
The proper solution would be to check for "pio-handle"
when a device is probed.
END
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Fix Kconfig entry indentation for Aspeed ast2500 pin control driver.
Fixes: 4f0e44e46615 ("aspeed: AST2500 Pinctrl Driver")
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.
Signed-off-by: Stefan Bosch <[email protected]>
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Recent Intel SoCs share a pinctrl mechanism with many common elements. Add
an implementation of this core functionality, allowing SoC-specific
drivers to avoid adding common code.
As well as a pinctrl driver this provides a GPIO driver based on the same
code.
Once other SoCs use this driver we may consider moving more properties to
the device tree (e.g. the community info and pad definitions).
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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At present these options cannot be enabled for SPL/TPL, but this can be
useful in some cases. Add Kconfig options to allow it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao <[email protected]>
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Remove the duplicated configs introduced when the same patch is
applied twice times:
- commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE
option")
- commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE
option")
Signed-off-by: Patrick Delaunay <[email protected]>
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In the Linux pinctrl binding, the pin configuration nodes don't need to
be direct children of the pin controller device (may be grandchildren for
example). This behavior is managed with the pinconfig u-class which
recursively bind all the sub-node of the pin controller.
But for some binding (when pin configuration is only children of pin
controller) that is not necessary. U-Boot can save memory and reduce
the number of pinconf instance when this feature is deactivated
(for arch stm32mp for example for SPL).
This patch allows to control this feature with a new option
CONFIG_PINCONF_RECURSIVE when it is possible for each individual
pin controller device.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Fixed CONFIG_IF_ENABLED() condition, added __maybe_unused:
Signed-off-by: Simon Glass <[email protected]>
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In the Linux pinctrl binding, the pin configuration nodes don't need to
be direct children of the pin controller device (may be grandchildren for
example). This behavior is managed with the pinconfig u-class which
recursively bind all the sub-node of the pin controller.
But for some binding (when pin configuration is only children of pin
controller) that is not necessary. U-Boot can save memory and reduce
the number of pinconf instance when this feature is deactivated
(for arch stm32mp for example for SPL).
This patch allows to control this feature with a new option
CONFIG_PINCONF_RECURSIVE when it is possible for each individual
pin controller device.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on UCLASS_PINCTRL and UCLASS_GPIO.
Signed-off-by: Patrick Delaunay <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
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After the merge of the new, generic pinctrl-code, the include for
rockchip/Kconfig was missing. Add it here, so we can select the
pinctrl-driver for SPL.
Signed-off-by: Philipp Tomsich <[email protected]>
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To make adding new subdirectories easier, let's enforce alphabetical
ordering of the includes of Kconfig files in the respective
subdirectories.
Signed-off-by: Philipp Tomsich <[email protected]>
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Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.
Signed-off-by: David Wu <[email protected]>
Acked-by: Heiko Stuebner <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This patch adds a Kconfig option to enable the full pinctrl driver
for the RK3399. This flag needs to be enabed in order to get the
features of the full pinctrl driver compiled in (i.e. a .set_state()
callback).
Signed-off-by: Christoph Muellner <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.
The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).
For Ocelot and Luton the controller is the same, only the pins to program
differ.
Signed-off-by: Gregory CLEMENT <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck <[email protected]>
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This patch adds pinctrl support for MT7629 SoC. The IO core found on
the SoC has the registers for pinctrl, pinconf and gpio mixed up in
the same register range. Hence the driver also implements the gpio
functionality through UCLASS_GPIO.
This also creates a common file as there might be other chips that use
the same binding and driver, then being a little more abstract could
help in the long run.
Signed-off-by: Ryder Lee <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Signed-off-by: Marek Behun <[email protected]>
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The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.
This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.
That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.
Signed-off-by: Alexander Graf <[email protected]>
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Add rk3128 pinctrl driver and grf/iomux structure definition.
Signed-off-by: Kever Yang <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Add PFC pincontrol driver for the Renesas RCar Gen3 R8A7795 and R8A7796
SoCs. This driver uses the PFC pin tables from Linux, thus letting us
share the occassional fixes to those tables. This driver also has a DT
support, so the pinmux is configured from DT instead of the ad-hoc setup
in board file.
This driver is meant to replace the pinmux part of SH_GPIO_PFC driver.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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Changes 'controlloers' to 'controllers' in the help-text for
SPL_PINCTRL.
Signed-off-by: Philipp Tomsich <[email protected]>
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Add init pinctrl driver support for:
- i2c;
- spi;
- uart;
- pwm;
- emmc/sdmmc;
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.
Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
- spl U-Boot : 0x0800_0000
- standard U-Boot : 0x0800_8000
To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)
Signed-off-by: Vikas Manocha <[email protected]>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <[email protected]>
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Add pinctrl support for Rockchip rv1108 soc
Signed-off-by: Andy Yan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add driver to support iomux setup for the most commonly
used peripherals on rk3368.
Signed-off-by: Andy Yan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This originally started out as
"pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.
However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Simon Glass <[email protected]>
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