| Age | Commit message (Collapse) | Author |
|---|
|
The pulse width field requires better precision during calculation. Add a
proper frequency divider calculation based on the PWM clock instead of
hardcoding it to 1.
Signed-off-by: Ion Agorria <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
The pulse_width is expressed as N/256. A 100% duty cycle is only possible
when multiplied by 256 instead of 255.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Add active-low support to the PWM controller, useful for active-low
pwm-leds.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
When PWM config was updated the clock was restarted which caused loss of
previous configuration of other channels. Further this fixes a bug/hang
that can happen when set_enable was called before set_config.
Signed-off-by: Jonas Schwöbel <[email protected]>
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
This caused linker errors in cases where IPUv3 was enabled (which
defines its own clocks).
Fixes: bfc778cb93a ("driver: pwm: pwm-imx: get and enable per/ipg
clock using dm")
Signed-off-by: Brian Ruley <[email protected]>
|
|
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.
Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.
Reviewed-by: Patrice Chotard <[email protected]> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <[email protected]> #TI boards
Acked-by: Yao Zi <[email protected]> #TH1520
Signed-off-by: Peng Fan <[email protected]>
|
|
Replace %pe with %d and adjust the argument accordingly in a dev_err()
call in the pwm-aspeed driver. U-boot doesn't support the %pe format
specifier. Likely it was copied from Linux.
Signed-off-by: David Lechner <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
|
|
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
|
|
This simplifies the "depends on" since we don't need DM_PWM listed
explicitly there as it already is made explicit via the surrounding
"if". No intended change in behavior.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Since it is registered as a U_CLASS_DRIVER, Sandbox PWM driver is a
Driver Model Driver and thus to be usable depends on DM_PWM to be
selected.
Let's make sure of that via the appropriate Kconfig option.
Signed-off-by: Quentin Schulz <[email protected]>
|
|
So it's visually better split from the other subsystems when using
menuconfig.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
|
|
The Cadence TTC has 3 channels that can each be used for PWM functions.
Ensure that the array has sufficient elements to avoid a possible memory
access overrun. Use a macro to keep the array size and limit checks in
sync so adjust checks to work with this.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
|
|
In meson_pwm_probe the for loop attempts to get the name of a clock but
the following if..else statements only perform useful work if -ENODATA
is returned from clk_get_by_name. If clk_get_by_name simply succeeds
then this results in a premature exit from the for loop and the
following code can never be reached. Make the else clause only apply for
an error return from clk_get_by_name.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
This driver references the logarithmic macros while relying on an
indirection inclusion of <linux/log2.h>. Add the missing include
directly.
Signed-off-by: Tom Rini <[email protected]>
|
|
A few pwm drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.
Signed-off-by: Tom Rini <[email protected]>
|
|
Add support for STM32MP25 SoC.
IPIDR register is used to check the hardware configuration register
when available to gather the number of complementary outputs.
Signed-off-by: Cheick Traore <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
If CONFIG_PWM_TI_EHRPWM is enabled, it throws the build warning in
dev_dbg() due to incorrect format specifier as,
"warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 4 has type ‘fdt_addr_t’ {aka ‘unsigned int’}".
Fix this with the correct format specifier.
Signed-off-by: Sukrut Bellary <[email protected]>
|
|
In am33xx SoC[1], enhanced capture (eCAP) supports auxiliary PWM (APWM).
This series adds the PWM driver support for the APWM feature for eCAP on
AM33xx.
eCAP HW also supports the capture mode. Currently, this driver only
supports APWM.
This is based on the Linux kernel driver -> drivers/pwm/pwm-tiecap.c
Version: v6.12
Tested on AM335x EVM[2].
[1] AM335x TRM - https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf
[2] AM335x EVM - https://www.ti.com/tool/TMDXEVM3358
Signed-off-by: Sukrut Bellary <[email protected]>
|
|
This patch adds pwm support for MediaTek MT7987 SoC.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Signed-off-by: Cheick Traore <[email protected]>
Reviewed-by: Fabrice Gasnier <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
This patch adds pwm channel 2 (pwm3) support for mt7981
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
Changing the duty-cycle should not blindly override (and clear) the
enable (EN) bit if it has already been set. For instance, a PWM
backlight can be enabled and set to a specific intensity using two
operations. The order of these operations should not matter.
Signed-off-by: Miquel Raynal <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Signed-off-by: Tom Rini <[email protected]>
|
|
Now that we have time conversion defines from in time.h there is no need
for each driver to define their own version.
Signed-off-by: Igor Prusov <[email protected]>
Reviewed-by: Svyatoslav Ryhel <[email protected]> # tegra
Reviewed-by: Eugen Hristev <[email protected]> #at91
Reviewed-by: Caleb Connolly <[email protected]> #qcom geni
Reviewed-by: Stefan Bosch <[email protected]> #nanopi2
Reviewed-by: Patrice Chotard <[email protected]>
|
|
This patch adds PWM support for MediaTek MT7988 SoC.
Signed-off-by: Weijie Gao <[email protected]>
|
|
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a base variable with uintptr_t size in the
rk_pwm.c file.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Default parent clock for the PWM on Tegra is a 32kHz clock and
is unable to support the requested PWM period.
Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.
This commit is equivalent to Linux kernel commit:
https://lore.kernel.org/all/[email protected]/
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <[email protected]> # ASUS TF201 T30
Tested-by: Thierry Reding <[email protected]> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
|
|
Perform a simple rename of CONFIG_IMX6_PWM_PER_CLK to CFG_IMX6_PWM_PER_CLK
Signed-off-by: Tom Rini <[email protected]>
|
|
This patch adds PWM support for MediaTek MT7981 SoC.
MT7981 uses a different register offset so we have to add a version field
to indicate the IP core version.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
This patch adds PWM support for MediaTek MT7986 SoC.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
To work correctly, this driver depends on SYSCON to get the base address
from the parent dts node.
Signed-off-by: Billy Tsai <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
|
|
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.
Cc: Jaehoon Chung <[email protected]>
Cc: Minkyu Kang <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Separe dm implementation from non dm implementation of pwm-imx
driver using CONFIG_DM_PWM
Signed-off-by: Tommaso Merciai <[email protected]>
|
|
Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c
and drop off pwm-imx-util.c
Signed-off-by: Tommaso Merciai <[email protected]>
|
|
Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms.
This function get clock rate using clk dm api
Signed-off-by: Tommaso Merciai <[email protected]>
|
|
Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat
and imx_pwm_probe driver function
Signed-off-by: Tommaso Merciai <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
|
|
A big part is the DM pinctrl driver, which allows us to get rid of quite
some custom pinmux code and make the whole port much more robust. Many
thanks to Samuel for that nice contribution! There are some more or less
cosmetic warnings about missing clocks right now, I will send the trivial
fixes for that later.
Another big chunk is the mkimage upgrade, which adds RISC-V and TOC0
(secure images) support. Both features are unused at the moment, but I
have an always-secure board that will use that once the DT lands in the
kernel.
On top of those big things we have some smaller fixes, improving the
I2C DM support, fixing some H6/H616 early clock setup and improving the
eMMC boot partition support.
The gitlab CI completed successfully, including the build test for all
161 sunxi boards. I also boot tested on a A64, A20, H3, H6, and F1C100
board. USB, SD card, eMMC, and Ethernet all work there (where applicable).
|
|
This is now handled automatically by the pinctrl driver.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
|
|
TTC has three modes of operations. Timer, PWM and input counters.
There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
|
|
This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".
Signed-off-by: Billy Tsai <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
|
|
At present the counter never hits the comparitor in this case. Add a
special case.
This ensures that the snow backlight works when at full brightness.
Fixes: 76c2ff3e5fd video: backlight: fix pwm's duty cycle calculation
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
|
|
Add support for the PWM found on the SAMA5D2 family of devices.
Signed-off-by: Dan Sneddon <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
Define LOG_CATEGORY for all uclass to allow filtering with
log command.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members
to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This
driver was sent to the mailing list before that change, merged after it,
and still has the old form. Apply the rename here as well.
Fixes: 1b9ee2882e6b ("pwm: Add a driver for Chrome OS EC PWM")
Signed-off-by: Alper Nebi Yasak <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
The pwm_sifive_set_config() and pwm_sifive_set_enable() cannot work
properly due to the wrong implementations. It will cause the u-boot
PWM command to not work as expected. The bugs will be resolved in this
patch.
Signed-off-by: Vincent Chen <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
|
