| Age | Commit message (Collapse) | Author |
|---|
|
Add support for reading DRAM size information from PMUGRF os_reg2 reg.
Signed-off-by: Jonas Karlman <[email protected]>
Tested-by: Aaron Griffith <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
The RAM_ROCKCHIP_DEBUG can be used only if DEBUG_UART is
available.
The next commit introduces changes in definition of debug
uart functions, so that DEBUG_UART is required to be defined
in order to initialize uart and use print functions.
Signed-off-by: Lukasz Czechowski <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Add ddr driver for rk3576 to get the ram capacity.
Signed-off-by: Heiko Stuebner <[email protected]>
Reviewed-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add support for reading DRAM size information from PMUGRF os_reg18 reg.
Compared to most Rockchip SoCs the RK3528 use os_reg18 for DRAM info,
instead of os_reg2.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Use the new symbol to refer to any 'SPL' build, including TPL and VPL
Signed-off-by: Simon Glass <[email protected]>
|
|
Give this function a slightly easier name.
Signed-off-by: Simon Glass <[email protected]>
|
|
Rename this function to indicate that it refers to any xPL phase.
Signed-off-by: Simon Glass <[email protected]>
|
|
The code here is confusing due to large blocks which are #ifdefed out.
Add a function phase_sdram_init() which returns whether SDRAM init
should happen in the current phase, using that as needed to control the
code flow.
This increases code size by about 500 bytes in SPL when the cache is on,
since it must call the rather large rockchip_sdram_size() function.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present gd->ram_size is 0 in SPL, meaning that it is not possible to
enable the cache. Correct this by always populating the RAM size
correctly.
This increases code size by about 500 bytes in SPL, since it must call
the rather large rockchip_sdram_size() function.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
|
|
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
|
|
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
Remove <common.h> from this driver directory and when needed
add missing include files directly.
Signed-off-by: Tom Rini <[email protected]>
|
|
Move cru_rk3308.h and grf_rk3308.h to arch-rockchip to match path used
for all other Rockchip SoCs.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.
While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
|
|
hardware.h is only defining macros which are "wrappers" around writel().
writel() is however not available in hardware.h, <asm/io.h> needs to be
included. This means in order to use the wrappers in hardware.h, one
also needs to include the <asm/io.h> header.
However, this cannot be done currently because hardware.h is included in
include/configs files, which are implicitly included by every code file
by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
fail because ALIGN (the ARM assembly directive) got redefined by some
of the include files coming from <asm.io.h>.
Because nothing in the include/configs file actually use hardware.h,
let's remove the inclusion of hardware.h from the include/configs files
and explicitly add it wherever it is required.
This prepares for the next commit where <asm/io.h> will be included in
hardware.h.
Cc: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
|
|
Add support for ddr4 on rv1126. Timing detection files are imported
from downstream Rockchip BSP u-boot. Allow selecting ddr4 ram with
define CONFIG_RAM_ROCKCHIP_DDR4.
Signed-off-by: Tim Lunn <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h
Move this out of the common header and include it only where needed.
Signed-off-by: Simon Glass <[email protected]>
|
|
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to handel both. The
syscon class driver also makes use of the regmap_init_mem_plat()
function, but has no way of knowing the format of the
device-specific platform data. In case of odd reg structures other
then that the syscon class driver assumes the regmap must be
filled in the individual syscon driver before pre-probe.
Also fix the ARRAY_SIZE divider in the syscon class driver.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin
prints:
"Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB"
U-Boot TPL prints:
"BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB"
Add missing high row detection so that U-Boot TPL prints Row=16, same as
the Rockchip ddr init bin:
"BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB"
Signed-off-by: Jonathan Liu <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
A condition in the rk3399 RAM initialization code used the old
CONFIG_RAM_RK3399_LPDDR4 constant name. This commit changes the
condition to use the correct CONFIG_RAM_ROCKCHIP_LPDDR4 constant.
Reviewed-by: Simon Glass <[email protected]>
|
|
Add ddr driver for rk3588 to get the ram capacity.
Co-developed-by: Jonas Karlman <[email protected]>
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Add LPDDR4 detection timings and support for RV1126.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Control the ddr init print messages via RAM_ROCKCHIP_DEBUG
instead of printing by default.
This gives an option to configs to enable these prints or
not.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add DDR driver for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add DDR loader parameters for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add DDR3 detection timings for Rockchip RV1126 SoC.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
We have common ddr types in rockchip or in general. So use
the common ddr type names instead of per Rockchip SoC to
avoid confusion.
The respective ddr type names will use on the associated
ddr SoC driver as these drivers are built per SoC at a time.
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo.
Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection")
Cc: Quentin Schulz <[email protected]>
Signed-off-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Currently the default initialisation frequency is 50MHz. Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.
Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.
Link: https://lore.kernel.org/u-boot/[email protected]/
Suggested-by: YouMin Chen <[email protected]>
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Tested-by: Michal Suchánek <[email protected]>
|
|
Frequency changes to 400MHz are presently reported as:
lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1
This is obviously wrong by 6 orders of magnitude.
Ensure frequency changes are reported accurately.
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Functions pointed to by this op pointer can return non-zero values
indicating an error. Ensure any error value is propagated back up the
call-chain.
Signed-off-by: Lee Jones <[email protected]>
Tested-by: Xavier Drudis Ferran <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Only add the dram channel when we finally setup it successfully at the
last step.
Signed-off-by: Han Pengfei <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Add rockchip rk3066 sdram driver
Signed-off-by: Paweł Jarosz <[email protected]>
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
A comma at the end of a line gives sometimes strange
effects in combination with some code formatters,
so replace a comma by a semicolon in the sdram_rk3188.c
and sdram_rk3288.c files.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Signed-off-by: Wolfgang Denk <[email protected]>
|
|
This is actually a misnomer now, since the phandle info may contain
a driver_info index or a udevice index. Rename it to use the word
'phandle', which seems more accurate. Add a comment while we are here.
Also add a test for this function.
Signed-off-by: Simon Glass <[email protected]>
|
|
Convert some of these occurences to C code, where it is easy to do. This
should help encourage this approach to be used in new code.
Signed-off-by: Simon Glass <[email protected]>
|
|
Now that we have a 'positive' Kconfig option, use this instead of the
negative one, which is harder to understand.
Signed-off-by: Simon Glass <[email protected]>
|
|
Add the driver for rk3568 u-boot to get sdram capacity.
Signed-off-by: Joseph Chen <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
|
|
Move this out of the common header and include it only where needed. In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly. Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
Try to maintain some consistency between these variables by using _plat as
a suffix for them.
Signed-off-by: Simon Glass <[email protected]>
|
|
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.
Signed-off-by: Simon Glass <[email protected]>
|
|
Rename this to be consistent with the change from 'platdata'.
Signed-off-by: Simon Glass <[email protected]>
|
|
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).
Rename some of the latter variables to end with 'plat' for consistency.
Signed-off-by: Simon Glass <[email protected]>
|
|
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <[email protected]>
|
