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2026-03-24qcom: rpmh: don't error for SLEEP requestsCasey Connolly
Just stub out non-active votes, if we return an error the caller may propagate it and not send its active vote. Since we don't suspend there's no risk of us entering a broken state due to missing votes. Link: https://patch.msgid.link/20260320-casey-qcom-rpmh-serial-fixes-v1-2-b81d05832eec@linaro.org Signed-off-by: Casey Connolly <[email protected]>
2026-01-14soc/qcom: rpmh: add RPMh readCasey Connolly
Implement support for RPMh reads, these allow reading out the current votes for RPMh controlled resources such as regulators and interconnects. Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-01-14soc/qcom: rpmh: correctly wait for TCS flushCasey Connolly
Several bugs were discovered in the rpmh-rsc driver which collectively meant we were never actually waiting for the TCS to flush, these were likely missed because U-Boot runs single threaded and the RPMh had typically processed the single command we sent by the time we went to send the next one. However a future patch will implement rpmh read support which requires us to properly wait for the RPMh command response so we can return the value. Fix these issues so we correctly ensure the TCS is done before returning. Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-01-14soc/qcom: rpmh: document rsc registersCasey Connolly
Add some comments explaining a few of the RSC registers Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-01-14soc: qcom: rpmh-rsc: reclaim the TCS to avoid spurious irq in LinuxNeil Armstrong
If we don't reclaim and clear the IRQ bits, we might get a spurious interrupt from this TCS in Linux: WARNING: CPU: 0 PID: 0 at drivers/soc/qcom/rpmh-rsc.c:451 tcs_tx_done+0x98/0x270 ... Call trace: tcs_tx_done+0x98/0x270 (P) __handle_irq_event_percpu+0x60/0x220 handle_irq_event+0x54/0xc0 handle_fasteoi_irq+0xa8/0x1c0 handle_irq_desc+0x3c/0x68 generic_handle_domain_irq+0x24/0x40 gic_handle_irq+0x5c/0xd0 ... Signed-off-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2026-01-09dm: core: Default to using DEVRES outside of xPLTom Rini
The devm alloc functions that we have may follow the Linux kernel model where allocations are (almost always) automatically free()'d. However, quite often we don't enable, in full U-Boot, the tracking and free()'ing functionality. This in turn leads to memory leaks because the driver author expects that since the functions have the same name as in the Linux Kernel they have the same behavior. In turn we then get functionally correct commits such as commit 00e1fed93c8c ("firmware: ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually add these calls. Rather than manually tracking allocations and implementing free()s, rework things so that we follow expectations by enabling the DEVRES functionality (outside of xPL phases). This turns DEVRES from a prompted symbol to a symbol that must be select'd, and we now remove our non-managed alloc/free functions from outside of xPL builds. Reviewed-by: Michael Trimarchi <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-12-08Merge tag 'v2026.01-rc4' into nextTom Rini
Prepare v2026.01-rc4
2025-11-20Merge tag 'interconnect-next-20251120' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next - Qualcomm RPMh cmd_db_read_slave_id() & cmd_db_read_aux_data() - Initial Interconnect implementation + Qualcomm RPMh support
2025-11-18soc: ti: pruss: Fix size ptr type in probePhilippe Schenker
When compiling for R5 with CONFIG_TI_PRUSS enabled, the pruss_probe() function passed a u64* to ofnode_get_addr_size_index(), which expects an fdt_size_t*. This caused a compiler error about incompatible pointer types. Cast the size pointer to fdt_size_t* to match the function signature. Signed-off-by: Philippe Schenker <[email protected]>
2025-11-18soc: qcom: cmd-db: Add cmd_db_read_slave_id() & cmd_db_read_aux_data() functionsAswin Murugan
Partially reverted commit "soc: qcom: cmd-db: drop unused functions" by restoring only the cmd_db_read_slave_id() and cmd_db_read_aux_data() functions, which were removed in that commit. These functions are required for the RPMH Power Domain Driver. Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Casey Connolly <[email protected]> Signed-off-by: Balaji Selvanathan <[email protected]> Signed-off-by: Aswin Murugan <[email protected]> Reviewed-by: Casey Connolly <[email protected]>> --- Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2025-11-12soc: exynos-pmu: add support for Exynos7 PMUKaustabh Chakraborty
Add the compatible string of Exynos7's PMU as defined in upstream dt-schema. This also supports derivative PMUs as defined in schema. There's no additional setup required here, so pmu_init is skipped. Signed-off-by: Kaustabh Chakraborty <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2025-10-09drivers: firmware: update xilinx_pm_request to support max payloadNaman Trivedi
Currently xilinx_pm_request API supports four u32 payloads. However the legacy SMC format supports five u32 request payloads and extended SMC format supports six u32 request payloads. Add support for the same in xilinx_pm_request API. Also add two dummy arguments to all the callers of xilinx_pm_request. The TF-A always fills seven u32 return payload so add support for the same in xilinx_pm_request API. Signed-off-by: Naman Trivedi <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Acked-by: Senthil Nathan Thangaraj <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/5ae6b560741f3ca8b89059c4ebb87acf75b4718e.1756388537.git.michal.simek@amd.com
2025-08-25Merge tag 'v2025.10-rc3' into nextTom Rini
Prepare v2025.10-rc3
2025-08-25soc: xilinx: zynqmp: Fix zu1cg device detectionFrank Böwingloh
Currently u-boot displayed a zu1cg soc as "Chip: zu1eg". A value of 0468_8093h in the IDCODE (CSU) Register defines a ZU1 soc not only for the EG family but also for the CG family as described in the Xilinx Zynq UltraScale+ UG1085 documentation in Table 1-2. Signed-off-by: Frank Böwingloh <[email protected]> Cc: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2025-08-19soc: ti: k3-navss-ringacc: Do not use uninitialised variableAndrew Goodbody
In k3_nav_ringacc_probe_dt there can be no error code returned from dev_read_u32_default so ret is not assigned to and should not be used. Remove the use of ret from the dev_err call as it is unitialised. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-19soc: ti: k3-navss-ringacc: NULL check before dereferenceAndrew Goodbody
Move the first dereference of ring to after the NULL check has occurred. This will prevent any possible dereference of NULL. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-14soc: Tighten some soc driver dependenciesTom Rini
The Qualcomm Snapdragon "SoC" driver cannot build without access to some ARM64 specific functionality. Express that requirements in Kconfig as well. Reviewed-by: Casey Connolly <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-04-03soc: Add information to identify the J742S2 SoC familyManorit Chawdhry
J742S2 has the same part number as J784S4 but JTAG_DEVICE_ID has a PKG bit that tells about J742S2. Add support for reading JTAG_DEVICE_ID and set family as J742S2 based on that. Link: https://www.ti.com/lit/pdf/spruje3 (TRM) Signed-off-by: Manorit Chawdhry <[email protected]>
2025-03-03arm64: versal2: Show major and minor silicon versionMichal Simek
ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to see are v1.0 or v2.0 instead of v16 or v32. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
2024-09-06soc: qcom: rpmh-rsc: add back __tcs_set_trigger() for SM8550/SM8650Neil Armstrong
The TCS writes has no effect after the removal of the __tcs_set_trigger() call, obviously it seems the RSC version 3 requires it to complete the transactions. Fixes: 80c5be164ad ("soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS support") Signed-off-by: Neil Armstrong <[email protected]> Tested-by: Caleb Connolly <[email protected]> # sm8250 rb5 Reviewed-by: Caleb Connolly <[email protected]>
2024-09-06soc: qcom: cmd-db: map cmd-db regionCaleb Connolly
On at least SM8650 this region might not be included in the memory map. Use the new mmu_map_region() helper to map it during bind(). Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-09-06soc: qcom: cmd-db: use strncmp() instead of memcmp()Caleb Connolly
memcmp() can cause aborts on some platforms and generally seems to be the wrong approach here. Use strncmp() instead which is more correct. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-08-30soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode APIChintan Vankar
Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to requested value and should not update other fields in ring configuration register. Signed-off-by: Chintan Vankar <[email protected]> Reviewed-by: Alexander Sverdlin <[email protected]> Reviewed-by: Vignesh Raghavendra <[email protected]>
2024-08-30soc: ti: k3-navss-ringacc: Fix reset ring APIVignesh Raghavendra
Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to requested size and not to 0. Fix this. Signed-off-by: Vignesh Raghavendra <[email protected]> Signed-off-by: Siddharth Vadapalli <[email protected]> Signed-off-by: Chintan Vankar <[email protected]> Reviewed-by: Alexander Sverdlin <[email protected]>
2024-08-30soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registersKishon Vijay Abraham I
Initialize base address of ring config registers required to natively setup ring cfg registers in the absence of Device Manager (DM) services at R5 SPL stage. Since register property is defined as "ring" for PKTDMA and "cfg" for UDMA, configure base address of ring configuration register accordingly. Reviewed-by: Alexander Sverdlin <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Siddharth Vadapalli <[email protected]> Signed-off-by: Chintan Vankar <[email protected]>
2024-08-05soc: zynqmp: Add support for zu1eg_lr deviceMichal Simek
There is new chip coming which is using new _lr suffix that's why record it in the list to enable bitstream in bit format loading. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/12a939e2c88e82a9828852a8f7f33dfa14a6a4b8.1722351201.git.michal.simek@amd.com
2024-07-26soc: qcom: add build infrastructureCaleb Connolly
Add Kconfig / Makefiles to build rpmh and cmd-db drivers. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh: U-Boot API changesCaleb Connolly
Fix build errors, add some debug logging. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh: drop unused functionsCaleb Connolly
A lot of the features in here are only relevant when running multi-threaded with interrupts. Drop everything except what we need to run single-threaded with a single TCS (which is all the rpmh-rsc framework in U-Boot supports). Keep rpmh_write_async() for simplicity and make it wrap the regular rpmh_write(). Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh: adjust headers for U-BootCaleb Connolly
Drop unused/unsupported Linux headers and add dm/device.h for U-Boot. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh-rsc: remaining U-Boot API changesCaleb Connolly
Minor adjustments to fix building with U-Boot and work correctly as a synchronous driver without interrupts. RPMh is fast enough that we can get away with just firing off requests and assuming they complete. U-Boot behaviour changes are annotated with a "U-Boot:" comment. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh-rsc: adjust probe for U-BootCaleb Connolly
Rework the rpmh-rsc initialization to use U-Boot's driver model and initialize cmd-db. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh-rsc: adjust headers for U-BootCaleb Connolly
Remove unsupported / unused Linux headers and add those needed for U-Boot. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS supportCaleb Connolly
Since U-Boot is single threaded, we can avoid most of the complexity that comes with handling more than one in-flight TCS. Drop all the rpmh code associated with multi-threading as we'll instead wait for a response on each TCS. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: cmd-db: adjust for U-Boot APICaleb Connolly
Keep the header pointer in the .data section so we don't initialize it again after relocation, adjust cmd_db_get_header() to work with the U-Boot API, and skip validating the header since all cmd-db users are children of the rpmh-rsc and those children will only probe if cmd-db initializes successfully. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: cmd-db: adjust probe for U-BootCaleb Connolly
Integrate cmd-db into the U-Boot driver model. This is just a wrapper around an in-memory database, so we just need to get the address and validate that cmd-db is there. Since cmd_db_header will be stored in the .data section we can skip bind if it's already set. Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: cmd-db: drop unused functionsCaleb Connolly
Due to our simpler rpmh-rsc driver and lack of debugfs, we don't need quite a few cmd-db functions, just drop them. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: cmd-db: adjust headers for U-BootCaleb Connolly
Replace unused/unsupported Linux headers with appropriate U-Boot alternatives. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-26soc: qcom: import rpmh and cmd-db drivers from LinuxCaleb Connolly
Import RPMh and cmd-db framework from Linux 6.10-rc6. Acked-by: Sumit Garg <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
2024-07-22drivers: soc: Remove duplicate newlinesMarek Vasut
Drop all duplicate newlines. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2024-07-19soc: ti: k3-socinfo: Add support for J721E SR2.0Neha Malcom Francis
Add support for identifying J721E SR2.0 Signed-off-by: Neha Malcom Francis <[email protected]> Reviewed-by: Nishanth Menon <[email protected]>
2024-06-19Merge patch series "Add basic U-Boot Support for J722S-EVM"Tom Rini
Jayesh Choudhary <[email protected]> says: Hello there, This series add the U-Boot support for our new platform of K3-SOC family - J722S-EVM which is a superset of AM62P. It shares the same memory map and thus the nodes are being reused from AM62P includes instead of duplicating the definitions. Some highlights of J722S SoC (in addition to AM62P SoC features) are: - Two Cortex-R5F for Functional Safety or general-purpose usage and two C7x floating point vector DSP with Matrix Multiply Accelerator for deep learning. - Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC). - 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio, 4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP, ePWM, among other peripherals. TRM: <https://www.ti.com/lit/zip/sprujb3> Schematics: <https://www.ti.com/lit/zip/sprr495> Boot test log: <https://gist.github.com/Jayesh2000/0313e58fde377f877a9a8f1acc2579ef>
2024-06-19soc: add info to identify the J722S SoC familyJayesh Choudhary
Include the part number for TI's j722s family of SoC to identify it during boot. Signed-off-by: Vaishnav Achath <[email protected]> Signed-off-by: Jayesh Choudhary <[email protected]>
2024-06-19soc: ti: k3-socinfo: Fix SOC JTAG entry orderJayesh Choudhary
Add JTAG_ID_PARTNO_* in alphabetical order. Signed-off-by: Jayesh Choudhary <[email protected]> Reviewed-by: Neha Malcom Francis <[email protected]>
2024-06-17soc: versal2: Add SoC driver for AMD Versal Gen 2Michal Simek
Communication is happening via firmware interface (SMC) or via direct register reading if firmware driver is not available. Also enable it via defconfig. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/22cf9c765e47ab03dbf2b8363e6626e809113432.1716994063.git.michal.simek@amd.com
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-10Merge patch series "Add AM64x Support to PRUSS and PRU_RPROC driver"Tom Rini
MD Danish Anwar <[email protected]> says: This series adds AM64x related compatibles to PRUSS and PRU_RPROC drivers. This series is a prerequisite for ICSSG Ethernet driver. Once Support for AM64x is added to PRUSS and PRU_RPROC driver, I'll send another series to enable ICSSG Ethernet driver for AM64x as well.
2024-05-10soc: ti: pruss: Add support for AM64xMD Danish Anwar
Add support for AM64x by adding it's compatible in pruss driver. Signed-off-by: MD Danish Anwar <[email protected]> Reviewed-by: Roger Quadros <[email protected]>
2024-05-07soc: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Bryan Brattlof <[email protected]> Signed-off-by: Tom Rini <[email protected]>