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https://source.denx.de/u-boot/custodians/u-boot-video into next
- video console refactoring and optimization
- support for fonts wider than 1 byte
- use named header for 8x16 font data
- support multiple fonts configuration
- move get_font_size() to truetype driver ops
- support font size configuration at runtime
- add 16x32 Terminus font from linux
- add 12x22 Sun font from linux
- add 12x22 console simple font test
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Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Modern mobile phones typically have high pixel density.
Bootmenu is hardly readable on those with 8x16 font.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Allow font size configuration at runtime for console_simple.c
driver. This needed for unit testing different fonts.
Configuring is done by `font` command, also used for font
selection in true type console.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Since multiple vidconsole drivers exists, vidconsole_get_font_size()
implementation cannot longer live in vidconsole_uclass.c file.
Move current vidconsole_get_font_size logic to truetype driver ops.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This needed for unit testing different fonts.
Configured fonts are placed in an array of fonts.
First font is selected by default upon console probe.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
[agust: fixed build error when bmp logo disabled]
Signed-off-by: Anatolij Gustschin <[email protected]>
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Devices with high ppi may benefit from wider fonts.
Current width implementation is limited by 1 byte, i.e. 8 bits.
New version iterates VIDEO_FONT_BYTE_WIDTH times, to process all
width bytes, thus allowing fonts wider than 1 byte.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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- move common code to vidconsole_internal.h and console_core.c
- unite probe functions
- get rid of code duplications in switch across bpp values
- extract common pixel fill logic in two functions one per
horizontal and vertical filling
- rearrange statements in put_xy* methods in unified way
- replace types - uint*_t to u*
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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As the file spear_sdhci.c file is already removed, delete the associated
configuration CONFIG_MMC_SDHCI_SPEAR.
Fixes: c942fc925e7dab ("mmc: spear: remove the entire spear_sdhci.c file")
Signed-off-by: Patrick Delaunay <[email protected]>
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According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
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According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
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The fttmr010 timer driver was deleted by
commit 29fc6f24926e ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c
Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.
This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.
[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf
Signed-off-by: Sergei Antonov <[email protected]>
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- Partial merge of a series of mine to select some framework options
that shouldn't be prompted for (and remove some unused code related to
that), and a partial merge of a series from Simon to remove some dead
code and address various CONFIG_IS_ENABLED/IS_ENABLED issues in code.
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This is used in some x86 code, so add a symbol for it.
Signed-off-by: Simon Glass <[email protected]>
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Add a new SPL_PHY_ATHEROS to avoid a build error on am335x_evm with split
config.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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At present we enable the sandbox I2C driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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At present we enable the sandbox RTC driver for all builds. Add a separate
Kconfig option to control this, so that it can be disabled in TPL, where
it is not needed.
Signed-off-by: Simon Glass <[email protected]>
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This converts 3 usages of this option to the non-SPL form, since there is
no SPL_PHY_FIXED defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 3 usages of this option to the non-SPL form, since there is
no SPL_MULTIPLEXER defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_FULL defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This is not used. Drop the driver and Kconfig option.
Signed-off-by: Simon Glass <[email protected]>
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This is not used since time out of mind.
Drop the driver and Kconfig option.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Michael Trimarchi <[email protected]>
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There are 4 USB controllers on MT8195, the controllers (IP1~IP3,
exclude IP0) have a wrong default SOF/ITP interval which is
calculated from the frame counter clock 24Mhz by default, but
in fact, the frame counter clock is 48Mhz, so we shall set the
accurate interval according to 48Mhz for those controllers.
Note:
The first controller no need set it, but if set it, shall change
tphy's pll at the same time.
Signed-off-by: Chunfeng Yun <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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The T-PHY controller is designed to use use PLL integer mode, but
in fact use fractional mode for some ones on mt8195 by mistake,
this causes signal degradation (e.g. eye diagram test fail), fix
it by switching PLL to 26Mhz from default 48Mhz to improve signal
quality.
Signed-off-by: Chunfeng Yun <[email protected]>
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Prefer to make use of FIELD_PREP() macro to prepare bitfield value,
then no need local macros anymore.
Signed-off-by: Chunfeng Yun <[email protected]>
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Imply means you can turn off the option and expect things to work
- "it's a good idea to have X enabled" is when to use imply
- "you must have X for Y to work" is when to use select
Use "select" here.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
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Add a new Kconfig option CONFIG_MVEBU_SPL_BOOT_DEVICE_NAND which instruct
make to generate kwbimage with NAND header. This image is used for booting
from NAND flash (either SPI or parallel).
Support is very simple, SPL after finishes DDR training returns back to the
BootROM (via CONFIG_SPL_BOOTROM_SUPPORT option) and BootROM then loads and
executes U-Boot proper.
To generate correct kwbimage NAND header, it is required to set following
Kconfig options:
CONFIG_SYS_NAND_PAGE_SIZE
CONFIG_SYS_NAND_BLOCK_SIZE
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION
They are used only by make / mkimage when generating final kwbimage.
CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION is a new mvebu specific Kconfig
option which is set into kwbimage NAND_BADBLK_LOCATION header field.
Signed-off-by: Pali Rohár <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-tpm into next
TPM auto startup and testing:
Due to U-Boot's lazy binding we always relied on command line tools to
initialize the TPM subsystem and devices. One exception is the EFI
subsystem. When compiled with TCG2 measured boot support the TPM was
automatically initialized.
However that init was not complete. The TCG specs [0] (and specifically
§12.3 Self-test modes) describe how self-tests on the device should be
performed. This PR is adding an extra API function, that can be used to
initialize the TPM2.0 properly.
Simon added the equivalent for TPM1.2 and refactored the DM tests to
include the new funtion.
[0] https://trustedcomputinggroup.org/wp-content/uploads/TPM-Rev-2.0-Part-1-Architecture-01.07-2014-03-13.pdf
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https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
Pull request for u-boot-nand-20230227
- mark reserved blocks from Ashok Reddy Soma
- backport BRCMNAND changes from Linux from Linus Walleij
- fix display of unknown raw ID from Patrice Chotard
- show reserved block in chip.erase from Michael Trimarchi
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All the TPM drivers as well as out TCG TIS API for a TPM2.0 device
return -EBUSY if the device has already been opened. Adjust
the sandbox TPM do return the same error code.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Prepare v2023.04-rc3
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The "nand chip.erase" command always printed as bad blocks even in the
case of reserved blocks. Reserved blocks are used for storing bad block
tables. The patch displays "bbt reserved" when printing reserved blocks in
"nand chip.erase" command.
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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In case ID is not found in manufacturer table, the raw ID is
printed using %*phN format which is not supported by lib/vsprintf.c.
The information displayed doesn't reflect the raw ID return by the
unknown spi-nand.
Use %02x format instead, as done in spi-nor-core.c.
For example, before this patch:
ERROR: spi-nand: spi_nand flash@0: unknown raw ID f74ec040
after
ERROR: spi-nand: spi_nand flash@0: unknown raw ID 00 c2 26 03
Fixes: 0a6d6bae0386 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Acked-by: Michael Trimarchi <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
always be done without ECC enabled.
This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2
clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
from ff ff ff to 00 00 00, reporting incorrect ECC errors.
Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller")
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Brian Norris <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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v2.1: tested on Netgear DGND3700v1 (BCM6368)
v2.2: tested on Netgear DGND3700v2 (BCM6362)
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Current pages sizes apply to controllers after v3.4
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Only v3.3-v5.0 have a different CS0 layout.
Controllers before v3.3 use the same layout for every CS.
Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller")
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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These registers are also used on v3.3.
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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The current code checks that the whole OOB area is erased.
This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will
fail due to the usable OOB bytes not being 0xff.
Correct this by only checking that data and ECC bytes aren't 0xff.
Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips")
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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This change adds support for flash dma v0.0.
Signed-off-by: Kamal Dasu <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation
while correcting erased page bitflips is wrong, fix it.
Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips")
Signed-off-by: Claire Lin <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Signed-off-by: Kamal Dasu <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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This change adds support for brcm NAND v7.3 controller. This controller
uses a newer version of flash_dma engine and change mostly implements
these differences.
Signed-off-by: Kamal Dasu <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Refactored NAND ECC and CMD address configuration code to use helper
functions.
Signed-off-by: Kamal Dasu <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
[Ported to U-Boot from the Linux kernel]
Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-by: William Zhang <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Reserved blocks are used for storing bad block tables. With "nand bad"
command, these reserved blocks are shown as bad blocks. This is leading
to confusion when compared with Linux bad blocks. Hence, display
"bbt reserved" when printing reserved blocks with "nand bad" command.
To acheive this, return 2 which represents reserved from nand_isbad_bbt()
instead of 1 in case of reserved blocks and catch it in cmd/nand.c.
"nand bad" command display's hexadecimal numbers, so add "0x" prefix.
Example log will show up as below.
ZynqMP> nand bad
Device 0 bad blocks:
0x00400000
0x16800000
0x16c00000
0x17000000
0x3d800000
0x3e400000
0xe8400000
0xff000000 (bbt reserved)
0xff400000 (bbt reserved)
0xff800000 (bbt reserved)
0xffc00000 (bbt reserved)
0x116800000
0x116c00000
0x1ff000000 (bbt reserved)
0x1ff400000 (bbt reserved)
0x1ff800000 (bbt reserved)
0x1ffc00000 (bbt reserved)
Signed-off-by: Ashok Reddy Soma <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Acked-By: Michael Trimarchi <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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All Nvidia boards use the same manufacturer, vendor ID and product ID
for the gadgets. Make them the defaults to remove some boilerplate from
the defconfigs.
Inspired by commit e02687bda96c ("sunxi: provide default USB gadget
setup") which did the same for Allwinner boards.
Tested-by: Thierry Reding <[email protected]> # T30 and T124
Signed-off-by: Maxim Schwalm <[email protected]>
Signed-off-by: Tom <[email protected]>
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Original t20 slink could work with commands only
fully divisible by 8. This patch removes such
restriction, so commands of any bitlength now
can be passed and processed.
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF600T T30
Tested-by: Svyatoslav Ryhel <[email protected]> # LG P895 T30
Tested-by: Thierry Reding <[email protected]> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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Default parent clock for the PWM on Tegra is a 32kHz clock and
is unable to support the requested PWM period.
Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.
This commit is equivalent to Linux kernel commit:
https://lore.kernel.org/all/[email protected]/
Tested-by: Andreas Westman Dorcsak <[email protected]> # ASUS TF T30
Tested-by: Robert Eckelmann <[email protected]> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <[email protected]> # ASUS TF201 T30
Tested-by: Thierry Reding <[email protected]> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <[email protected]>
Signed-off-by: Tom <[email protected]>
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Make sure the PHY subsystem is activated for the uniphier DWC3 glue
logic, as it depends on PHY implementation there.
Signed-off-by: Marek Vasut <[email protected]>
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dwc3-uniphier depends on xhci-dwc3 framework, however, it is preferable
to use dwc3-generic.
This driver calls the exported dwc3-generic functions and redefine
the SoC-dependent operations to fit dwc3-generic.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Add USB3 PHY driver support to control clocks and resets needed to enable
PHY. The phy_ops->init() and exit() control PHY clocks and resets only,
and clocks and resets for the controller and the parent logic are enabled
in advance.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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