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At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini <[email protected]>
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Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_USB_XHCI_EXYNOS
CONFIG_USB_EHCI_EXYNOS
Signed-off-by: Tom Rini <[email protected]>
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add nuvoton BMC npcm750 host configuration driver
Signed-off-by: Jim Liu <[email protected]>
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Request and enable the controller level clocks.
Signed-off-by: Joel Stanley <[email protected]>
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The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.
Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:
ofnode node;
dev_for_each_subnode(node, parent) {
struct udevice *dev;
int ret;
ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
ofnode_get_name(node),
node, &dev);
if (ret)
return ret;
}
However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.
Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.
Select MISC as the controller driver is implemented as a misc device.
Signed-off-by: Joel Stanley <[email protected]>
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Signed-off-by: Joel Stanley <[email protected]>
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In order to use the clock from the sdhci driver, add the SD clock.
Signed-off-by: Joel Stanley <[email protected]>
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Adjust clock to stay compatible with those used by the Linux kernel
device tree.
Signed-off-by: Joel Stanley <[email protected]>
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A common message across platforms that prints the clock number.
Signed-off-by: Joel Stanley <[email protected]>
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Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
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The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
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The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
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Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <[email protected]>
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add BMC NPCM750 phy control driver
Signed-off-by: Jim Liu <[email protected]>
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Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_FSL_PCI_VER_3_X
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PCI_MSC01
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SH7751_PCI
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PCI_CONFIG_HOST_BRIDGE
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PCI_GT64120
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PCI_SCAN_SHOW
Signed-off-by: Tom Rini <[email protected]>
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This driver is not enabled anywhere, remove it. Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PCIE_IMX
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_FSL_SEC_MON
CONFIG_SYS_FSL_SEC_MON_BE
CONFIG_SYS_FSL_SEC_MON_LE
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_ESDHC_DETECT_QUIRK
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_DDR_RAW_TIMING
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_SPD_BUS_NUM
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_USB_GADGET_DWC2_OTG_PHY
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.
Cc: Jaehoon Chung <[email protected]>
Cc: Minkyu Kang <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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- Drop the emulator CONFIG test from include/configs/ls1088ardb.h
- Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in
drivers/ddr/fsl/Kconfig
Signed-off-by: Tom Rini <[email protected]>
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As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong <[email protected]>
Cc: Chin-Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Holger Brunck <[email protected]>
Cc: Ley Foon Tan <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Siew Chin Lim <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: hee Hong Ang <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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This value is always used at the default, rename it for now. This
likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_DW_ALTDESCRIPTOR
Signed-off-by: Tom Rini <[email protected]>
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Commit 81755b8c20fe ("usb: host: ehci-generic: Make resets and clocks
optional") improved the error check to cover the reset property being
optional. However this was using the wrong error variable for the
check, so would now never fail.
Use the correct error variable for checking the result of
reset_get_bulk(), to actually report genuine errors.
Fixes: 81755b8c20fe ("usb: host: ehci-generic: Make resets and clocks optional")
Signed-off-by: Andre Przywara <[email protected]>
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selected ecc.mode
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
This change fixes usage of none ecc mode if it is specified in DTS file.
Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <[email protected]>
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https://github.com/tienfong/uboot_mainline
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All the source code of clk-mem-n5x.c and clk-n5x.c are from Intel,
update the license to use both GPL2.0 and BSD-3 Clause because this
copy of code may used for open source and internal project.
Signed-off-by: Teik Heng Chong <[email protected]>
Reviewed-by: Tien Fong Chee <[email protected]>
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For some reason, on the Mercury+ AA1 module, calling
fpgamgr_wait_early_user_mode immediately after writing the peripheral
bitstream leaves the fpga in a broken state (ddr calibration hangs).
Adding a delay before the first sync word is written seems to fix this.
Inspecting the fpgamgr registers before and after the delay,
imgcfg_FifoEmpty is the only bit that changes. Waiting for this bit
(instead of a hardcoded delay) also fixes the issue.
Signed-off-by: Paweł Anikiel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Apply some optimizations to speed up bitstream loading
(both for full and split periph/core bitstreams):
* Change the size of the first fs read, so that all the subsequent
reads are aligned to a specific value (called MAX_FIRST_LOAD_SIZE).
This value was chosen so that in subsequent reads the fat fs driver
doesn't have to allocate a temporary buffer in get_contents
(assuming 8KiB clusters).
* Change the buffer size to a larger value when reading to ddr
(but not too large, because large transfers cause a stack overflow
in the dwmmc driver).
Signed-off-by: Paweł Anikiel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This driver is a child of the rstmgr driver, both of which share the
same devicetree node. As a result, passing the child's udevice pointer
to dev_read_addr_ptr results in a failure of reading the #address-cells
property. Use the parent udevice pointer instead.
Signed-off-by: Paweł Anikiel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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From the ATSHA204A datasheet (document DS40002025A):
Wake: If SDA is held low for a period greater than tWLO, the device
exits low-power mode and, after a delay of tWHI, is ready to receive
I2C commands.
tWHI value can be found in table 7-2.
Signed-off-by: Paweł Anikiel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for rk3328 nonopi-r2s boot env;
- Fix for rk8xx pmic boot on power plug-in;
- Fix for tee.bin support in fit image;
- rk3288 board dts update or fix;
- Some rk3399 board fix;
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https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:
This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
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https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Versal QSPI/OSPI changes for v2022.10
- Add new flash types
- Add cadence ospi driver for Xilinx Versal
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Add support for gpio PORT E, which is available on e.g. sama7g5 SoC.
Signed-off-by: Mihai Sain <[email protected]>
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When the requested flash speed is 0, the baudrate division for the
requested speed causing drop in the performance. So set the ospi flash
to operate at max frequency when requested speed is zero.
Signed-off-by: T Karthik Reddy <[email protected]>
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.
Signed-off-by: T Karthik Reddy <[email protected]>
Signed-off-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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