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This function always succeeds, so don't check its return value.
Signed-off-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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This function always succeeds, so don't check its return value.
Signed-off-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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This function always succeeds, so don't check its return value.
Signed-off-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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This function always succeeds, so don't check its return value.
Signed-off-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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When freeing a clock there is not much we can do if there is an error, and
most callers do not actually check the return value. Even e.g. checking to
make sure that clk->id is valid should have been done in request() in the
first place (unless someone is messing with the driver behind our back).
Just return void and don't bother returning an error.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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TTC has three modes of operations. Timer, PWM and input counters.
There is already driver for timer under CADENCE_TTC_TIMER which is used for
ZynqMP R5 configuration.
This driver is targeting PWM which is for example configuration which can
be used for fan control.
The driver has been tested on Xilinx Kria SOM platform where fan is
connected to one PL pin. When TTC output is connected via EMIO to PL pin
TTC pwm can be configured and tested for example like this:
pwm config 0 0 10000 1200
pwm enable 0 0
pwm config 0 0 10000 1400
pwm config 0 0 10000 1600
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
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When DT node has pwm-cells property it shouldn't be bind as timer driver
but as PWM driver. That's why make sure that this property is checked.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/r/434ef195fbedea9f83672a12d1ace0da16e8832e.1634303847.git.michal.simek@xilinx.com
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The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and
200 MHz. When user select SD frequency as 200MHz in the design, the
actual frequency is going to come around ~187MHz (<= 200MHz considering
the parent clock and divisor selection). We need to set SDx_BASECLK as
200 in this case, setting 187 will result in tuning failures in mmc.
Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency
range.
Signed-off-by: Ashok Reddy Soma <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Link: https://lore.kernel.org/r/6c1e5eeeedd2864a0c85e6b409d182031d8c6c1a.1648210268.git.michal.simek@xilinx.com
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Serial IP has output buffer which status is indicated by two bits. If fifo
if empty or full. Default configuration is that chars are pushed to fifo
till it is full. Time to time it is visible that chars are scambled and
logs are not visible. Not sure what it is exactly happening but all the
time it helps to change driver behavior to write only one char at a time.
That's why enable this mode when debug uart is enabled not to see scrambled
chars in debug by default.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/332b2106d7a8190dd1001b5387f8bd1fba2e061b.1648205405.git.michal.simek@xilinx.com
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Change if condition to cover SPL flow. SPL needs to have
CONFIG_SPL_POWER_DOMAIN enabled to be able to bind
CONFIG_ZYNQMP_POWER_DOMAIN driver.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/8e1d381013a0ce39d736da166d2b401c4b12d38a.1646064792.git.michal.simek@xilinx.com
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This is not used. Drop it.
Signed-off-by: Simon Glass <[email protected]>
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This converts the following to Kconfig:
CONFIG_VIDEO_BCM2835
This is the final ad-hoc CONFIG_VIDEO_... to convert.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Matthias Brugger <[email protected]>
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This is no-longer used and is the last reference to video_hw_init(). Drop
it.
Signed-off-by: Simon Glass <[email protected]>
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This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <[email protected]>
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This does not use driver model and is more than two years past the
migration date. Drop it.
It can be added back later if needed.
Signed-off-by: Simon Glass <[email protected]>
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This is not used in U-Boot anymore. Drop it.
Signed-off-by: Simon Glass <[email protected]>
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Drop the Kconfigs which are not used and all references to them. In
particular, this drops CONFIG_VIDEO to avoid confusion and allow us to
eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO.
Also drop the prototype for video_get_info_str() which is no-longer used.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Jason Liu <[email protected]>
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This is not used now. Drop it.
Signed-off-by: Simon Glass <[email protected]>
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Unfortunately this driver uses the old video structure to store things.
This is not supported with driver model.
Drop the old code and comment out the other pieces, so the maintainer can
take a look.
Signed-off-by: Simon Glass <[email protected]>
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The non-driver model video support was removed two years ago. Drop this
driver, which is only used by nokia_rx51.
Signed-off-by: Simon Glass <[email protected]>
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Prepare v2022.04-rc5
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Previous u-boot code changed the default bch setting behavior and caused
backward compatible issue. This fix choose the legacy bch geometry back
again as the default option. If the minimum ecc strength that NAND chips
required need to be chosen, it can be enabled by either adding DT flag
"fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The
unused flag "fsl,legacy-bch-geometry" get removed.
Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry)
Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND)
Tested-by: Tim Harvey <[email protected]>
Tested-by: Sean Nyekjaer <[email protected]>
Signed-off-by: Han Xu <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
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Freescale git repos are now on source.codeaurora.org.
Signed-off-by: Pali Rohár <[email protected]>
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Use the MEMA - MEMD registers on the PFUZE100 as bootcount
registers.
Based on work from Heiko Schocher <[email protected]>.
Signed-off-by: Philip Oberfichtner <[email protected]>
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In some cases we do not want to enable partition support in SPL. Add an
option to allow this.
Signed-off-by: Simon Glass <[email protected]>
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This patchs add the signal description array for PWM pinctrl settings.
Signed-off-by: Billy Tsai <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
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This patch add the support of PWM controller which can be found at aspeed
ast2600 soc. The pwm supoorts up to 16 channels and it's part function
of multi-function device "pwm-tach controller".
Signed-off-by: Billy Tsai <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Chia-Wei Wang <[email protected]>
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Add following two new PCI class codes defines into pci_ids.h include file:
PCI_CLASS_BRIDGE_PCI_NORMAL
PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
And use these defines in all U-Boot code for describing PCI class codes for
normal and subtractive PCI bridges.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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This converts the following to Kconfig:
CONFIG_LCD_INFO
CONFIG_LCD_LOGO
CONFIG_LCD_INFO_BELOW_LOGO
CONFIG_LCD_IN_PSRAM
Cc: Anatolij Gustschin <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
CONFIG_GURNARD_SPLASH
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_MII_INIT
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PHY_RESET_DELAY
Cc: Ramon Fried <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_LPC32XX_ETH
Cc: Ramon Fried <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_RMII
Cc: Ramon Fried <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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- Grammar fixes
- Clarify explanations
Signed-off-by: Michael Opdenacker <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Per dm_i2c_ops.probe_chip documentation, i2c_probe_chip() shall fallback
to default probe method when .probe_chip() returns -ENOSYS.
Signed-off-by: Nikita Yushchenko <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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This patch replaces use fdtdec_get_addr with simpler dev_read_addr().
fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although
not confirmed, it could be related to the fact, that quoting the documentation,
"This variant hard-codes the number of cells used to represent the address and
size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)".
Signed-off-by: Adrian Fiergolski <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
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Once request is sent, and before receiving a response, the delay is required.
This patch fixes missing delay for before first response try.
Signed-off-by: Adrian Fiergolski <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
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If the maximum number of wake-up attempts is exceeded, return -ETIMEDOUT.
Signed-off-by: Adrian Fiergolski <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dm into next
binman FIT improvements
various minor sandbox improvements
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There is seldom a need to refresh at 100Hz and it uses a lot of CPU.
Reduce the rate to 10Hz which seems to be adequate.
Signed-off-by: Simon Glass <[email protected]>
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Some files cannot be written but read-only access is still useful for
tests. Add a fallback to read-only access when needed.
This is useful in CI when opening a large data file provided by docker,
where read/write access would result in copying the file, thus needing
a lot of extra disk space.
Signed-off-by: Simon Glass <[email protected]>
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With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back. Set the fallback directly now.
Cc: Fabio Estevam <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Stefano Babic <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Now that all boards have been converted, remove the non-DM_ETH code.
Cc: Fabio Estevam <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Stefano Babic <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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A comma at the end of a line gives sometimes strange
effects in combination with some code formatters,
so replace a comma by a semicolon in the sdram_rk3188.c
and sdram_rk3288.c files.
Signed-off-by: Johan Jonker <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Remove double semi-colon that has been forgotten while adding the
driver. This is only a style fix since it doesn't change the
functionality of the driver.
Signed-off-by: Giulio Benetti <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.07-rc1
microblaze:
- Add support for reserved memory
xilinx:
- Update FRU code with MAC reading
zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0
zynq:
- Update nand binding
nand:
- Aligned zynq_nand to upstream DT binding
net:
- Add support for ethernet-phy-id
mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs
gpio:
- Add driver for slg7xl45106
firmware:
- Add support for dynamic SD config
power-domain:
- Update zynqmp driver with the latest firmware
video:
- Add skeleton driver for DP and DPDMA
i2c:
- Fix i2c to work with QEMU
pinctrl:
- Add driver for zynqmp pinctrl driver
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- Rockchip, i.MX and xenon_sdhci updates
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- k210 updates
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On RK3568, a register bit must be set to enable Enhanced Strobe.
However, it appears that the address of this register may differ from
vendor to vendor and should be read from the underlying MMC IP. Let the
Rockchip SDHCI driver read this address and set the relevant bit when
Enhanced Strobe configuration is requested.
The IP uses a custom mode select value (0x7) for HS400, use that instead
of the common but non-standard SDHCI_CTRL_HS400 value (0x5). Also add
some necessary DLL_STRBIN and DLL_TXCLK configuration for HS400.
Additionally, a bit signifying that the connected hardware is an eMMC
chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also
make the driver set this bit as appropriate.
This is partly ported from Linux's Synopsys DWC MSHC driver which
happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in
Linux tree).
Co-developed-by: Yifeng Zhao <[email protected]>
Signed-off-by: Yifeng Zhao <[email protected]>
Signed-off-by: Alper Nebi Yasak <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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