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Now that we support having CONFIG_SYS_CONFIG_NAME be unset to indicate a
lack of board.h file, unset this on the coreboot platform and remove
the otherwise empty file.
Signed-off-by: Tom Rini <[email protected]>
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Use the common include and add some options specific to this board.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]> # Intel Edison
Reviewed-by: Bin Meng <[email protected]>
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Perform a simple rename of CONFIG_STD_DEVICES_SETTINGS to CFG_STD_DEVICES_SETTINGS
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_MONITOR_LEN
To do this, we set a default of 0 for everyone because there are a
number of cases where we define CONFIG_SYS_MONITOR_LEN but the only
impact is that we set TOTAL_MALLOC_LEN to be CONFIG_SYS_MALLOC_LEN +
CONFIG_ENV_SIZE, so we must continue to allow all boards to set this
value. Update the SPL code to use 200 KB as the default raw U-Boot size
directly, if we don't have a real CONFIG_SYS_MONITOR_LEN value.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_IDE_MAXBUS
CONFIG_SYS_IDE_MAXDEVICE
CONFIG_SYS_ATA_BASE_ADDR
CONFIG_SYS_ATA_STRIDE
CONFIG_SYS_ATA_DATA_OFFSET
CONFIG_SYS_ATA_REG_OFFSET
CONFIG_SYS_ATA_ALT_OFFSET
CONFIG_SYS_ATA_IDE0_OFFSET
CONFIG_SYS_ATA_IDE1_OFFSET
CONFIG_ATAPI
CONFIG_IDE_RESET
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Enable this feature so that a splash screen can be provided.
Signed-off-by: Simon Glass <[email protected]>
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Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.
But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Since we already swtiched to use the new mechanism for building
U-Boot for coreboot, coreboot.h is no longer needed so remove it.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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There are many places in the U-Boot source tree which refer to
CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT
that is currently defined in coreboot.h.
Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch
to board configuration file to build U-Boot later.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Many of the x86 CONFIG options will be common across different boards. Move
them to a common file.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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The code density of x86_64 is not wonderful. Increase the maximum boot
size and adjust the load address to cope.
Signed-off-by: Simon Glass <[email protected]>
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Display the type of CPU (x86 or x86_64) when starting up.
Signed-off-by: Simon Glass <[email protected]>
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This makes use of the existing device tree node to use driver model
for the serial console.
Signed-off-by: Simon Glass <[email protected]>
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Convert over this driver, using device tree to pass in the required
information. The peripheral is still probed, just the number of GPIO banks
and their offsets is in the device tree (previously this was a table in
the driver).
Signed-off-by: Simon Glass <[email protected]>
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Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.
Signed-off-by: Simon Glass <[email protected]>
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To get a display in U-Boot on link you must either build a coreboot that
always sets it up, or use Esc-Refresh-Power to reset the machine.
When we do have a display, it is nice to display the model at the top, so
enable this option.
Signed-off-by: Simon Glass <[email protected]>
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We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since "boot>" doesn't seem any more useful.
Signed-off-by: Simon Glass <[email protected]>
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Add defines to enable the Chrome OS EC interface and set it up on init.
Signed-off-by: Simon Glass <[email protected]>
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The dhcp option is required to get bootp to work on the Chromebook Pixel,
so enable it.
Signed-off-by: Simon Glass <[email protected]>
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This option specifies the default Device Tree used for the run-time
configuration of U-Boot.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Michal Simek <[email protected]>
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This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE
Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.
Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Simon Glass <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Minkyu Kang <[email protected]>
Acked-by: Michal Simek <[email protected]>
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Guard the LOADMK functionality with config to provide
an option to enable or disable it.
Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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The last users of CONFIG_KGDB_SER_INDEX were removed more than 3 years
ago in commits 550650ddd0 and bf16500f79, either kgdb subsystem should
care about this parameter or it should be gone completely.
Signed-off-by: Vladimir Zapolskiy <[email protected]>
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Remove platform CONFIG_SYS_HZ definition for configs a-z*.
Signed-off-by: Rob Herring <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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libata already has similar functions as implemented in the ahci code.
Refactor the code to use the libata variants and remove the dependency on
ata.h. Convert some defines to use the version from libata.h. Also, remove
some unnecessary memset's of bss data.
This is a step toward hopefully merging ahci.c and dw_ahsata.c which are
essentially the same driver.
Signed-off-by: Rob Herring <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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Add configs to enable tracing when it is needed.
Signed-off-by: Simon Glass <[email protected]>
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The new name is more aligned with Linux kernel's naming of TPM driver.
Signed-off-by: Tom Wai-Hong Tam <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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We don't use zlib and gzip but do use lzo, so enable this.
Signed-off-by: Simon Glass <[email protected]>
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This is a convenient way of finding out where boottime is going. Enable
it for coreboot.
Signed-off-by: Simon Glass <[email protected]>
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While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <[email protected]>
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This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <[email protected]>base
Signed-off-by: Simon Glass <[email protected]>
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Since the ICH SPI controller uses PCI, we must ensure that PCI is available
before it is inited.
This fixes the current "ICH SPI: Cannot find device" message on boot.
Signed-off-by: Simon Glass <[email protected]>
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This command is useful for measuring SPI flash load times and the like.
Enable gettime as well to obtain absolute time tick values.
Signed-off-by: Simon Glass <[email protected]>
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Turn on SPI flash support and related commands.
Signed-off-by: Simon Glass <[email protected]>
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Enable PCI EHCI, storage, keyboard and Ethernet for USB.
Signed-off-by: Simon Glass <[email protected]>
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Make use of a device tree on coreboot boards, and set the default
to link.
Signed-off-by: Simon Glass <[email protected]>
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Invert the polarity of this option to simplify the Makefile logic.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Gabe Black <[email protected]>
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Enable the io command for x86 on coreboot.
Signed-off-by: Simon Glass <[email protected]>
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The config is current broken. It compiles but does not boot because IDE is
enabled. Remove all IDE options, and enable SCSI instead.
Also add a working boot command and Linux bootargs, and enable command
line editing to make it easier to work with.
Signed-off-by: Simon Glass <[email protected]>
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This allows u-boot to figure out the partitions of a chrome-os install.
Signed-off-by: Gabe Black <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Enable the display on coreboot, using CFB.
Signed-off-by: Simon Glass <[email protected]>
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This helps us monitor boot progress and determine where U-Boot dies if
there are any problems.
Signed-off-by: Stefan Reinauer <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Enable this option to support booting a zImage.
Signed-off-by: Simon Glass <[email protected]>
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Coreboot uses this controller to implement GPIO access.
Signed-off-by: Simon Glass <[email protected]>
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This option protects the printf() functions from overflow.
Signed-off-by: Simon Glass <[email protected]>
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We want to support VGA, serial, USB keyboard and the Coreboot memory
console buffer.
Signed-off-by: Simon Glass <[email protected]>
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