| Age | Commit message (Collapse) | Author |
|---|
|
This converts the following to Kconfig:
CONFIG_TEGRA_GPU
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_USB_EHCI_TXFIFO_THRESH
Signed-off-by: Tom Rini <[email protected]>
|
|
On merge, fixup order of fdtdec_add_reserved_memory parameters in
arch/arm/cpu/armv8/fsl-layerscape/soc.c
Signed-off-by: Tom Rini <[email protected]>
|
|
On mvebu this is defined if and only if !ARM64.
Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and
ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300).
Signed-off-by: Marek Behún <[email protected]>
|
|
In preparation for moving this option to Kconfig, rename it to be
consistent with other USB EHCI Kconfig options.
Signed-off-by: Marek Behún <[email protected]>
|
|
The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.
Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.
Signed-off-by: Thierry Reding <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
Now that we have consistent usage, migrate this symbol to Kconfig.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
|
|
- In most of the codebase, we reference CONFIG_SYS_LOAD_ADDR and not
CONFIG_LOADADDR.
- Generally, CONFIG_SYS_LOADADDR is set to CONFIG_LOADADDR and then as
noted, we use CONFIG_SYS_LOADADDR.
Signed-off-by: Tom Rini <[email protected]>
|
|
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig. We still have the GIC
related registers that need to be handled more cleanly but start by
moving this symbol to Kconfig.
Signed-off-by: Tom Rini <[email protected]>
|
|
For booting via UEFI we need to define the fdtfile option so
bootefi has the option to load a fdtfile from disk. For arm64
the kernel dtb is located in a vendor directory so we define
that as nvidia for that architecture.
Signed-off-by: Peter Robinson <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The L4T kernel is 32MB+, and can overwrite the ramdisk/fdt loaded
from extlinux.conf. Adjust the load addresses to fix this for now.
Using the calculated_env addresses table from T186 U-Boot is a
better fix, but it isn't working correctly on T210 U-Boot right now,
so this will do until I can fix it.
Signed-off-by: Tom Warren <[email protected]>
|
|
There's a number of dangling comments in various tegra configs post migrations
of various configs so lets clean them up.
Signed-off-by: Peter Robinson <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Marcel Ziswiler <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: [email protected]
Cc: Lucas Stach <[email protected]>
Cc: Stefan Agner <[email protected]>
Cc: Alban Bedel <[email protected]>
Cc: Allen Martin <[email protected]>
Reviewed-by: Marcel Ziswiler <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
|
|
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current
values into the defconfig and removing them from the headers.
I did not attempt to add more default values in and for now will leave
that to maintainers.
Signed-off-by: Tom Rini <[email protected]>
|
|
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place
the stack/... 512KiB from the end of the U-Boot binary. This should be
plenty to accommodate the current DTBs (max 64 KiB), early malloc region
(6KiB), stack usage, and plenty of slack, while still not placing it too
far away from the U-Boot binary.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
Now that EHCD does not use CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS,
remove it in all boards' config files.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Stefan Roese <[email protected]>
|
|
This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all
cases we are mirroring the values used by the Linux Kernel here. Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.
Cc: Albert Aribaud <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Prafulla Wadaskar <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Nagendra T S <[email protected]>
Cc: Vaibhav Hiremath <[email protected]>
Acked-by: Lokesh Vutla <[email protected]>
Cc: Steve Rae <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Stefan Agner <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Cc: Mateusz Kulikowski <[email protected]>
Cc: Peter Griffin <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
Acked-by: "Pali Rohár" <[email protected]>
Cc: Adam Ford <[email protected]>
Cc: Steve Sakoman <[email protected]>
Cc: Grazvydas Ignotas <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Robert Baldyga <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Thomas Weber <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: David Feng <[email protected]>
Cc: Alison Wang <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: York Sun <[email protected]>
Cc: Shengzhou Liu <[email protected]>
Cc: Mingkai Hu <[email protected]>
Cc: Prabhakar Kushwaha <[email protected]>
Cc: Aneesh Bansal <[email protected]>
Cc: Saksham Jain <[email protected]>
Cc: Qianyu Gong <[email protected]>
Cc: Wang Dongsheng <[email protected]>
Cc: Alex Porosanu <[email protected]>
Cc: Hongbo Zhang <[email protected]>
Cc: tang yuantian <[email protected]>
Cc: Rajesh Bhagat <[email protected]>
Cc: Josh Wu <[email protected]>
Cc: Bo Shen <[email protected]>
Cc: Viresh Kumar <[email protected]>
Cc: Hannes Schmelzer <[email protected]>
Cc: Thomas Chou <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Sam Protsenko <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Christophe Ricard <[email protected]>
Cc: Anand Moon <[email protected]>
Cc: Beniamino Galvani <[email protected]>
Cc: Carlo Caione <[email protected]>
Cc: huang lin <[email protected]>
Cc: Sjoerd Simons <[email protected]>
Cc: Xu Ziyuan <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "Ariel D'Alessandro" <[email protected]>
Cc: Kever Yang <[email protected]>
Cc: Samuel Egli <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Hans de Goede <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Siarhei Siamashka <[email protected]>
Cc: Boris Brezillon <[email protected]>
Cc: Andre Przywara <[email protected]>
Cc: Bernhard Nortmann <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Ben Whitten <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Alexander Graf <[email protected]>
Cc: Sekhar Nori <[email protected]>
Cc: Vitaly Andrianov <[email protected]>
Cc: "Andrew F. Davis" <[email protected]>
Cc: Murali Karicheri <[email protected]>
Cc: Carlos Hernandez <[email protected]>
Cc: Ladislav Michl <[email protected]>
Cc: Ash Charles <[email protected]>
Cc: Mugunthan V N <[email protected]>
Cc: Daniel Allred <[email protected]>
Cc: Gong Qianyu <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
|
|
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander Graf <[email protected]>
|
|
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf <[email protected]>
|
|
The size allocation for SPL is increased in all cases to match the
already-expanded value used on Tegra124. This is both for general
consistency, and because the seaboard build trips over the limit already
when using one of the ARM compilers packaged with 14.04. For the record,
when building Seaboard:
arm-linux-gnueabi- SPL is too big by 0x36 bytes
arm-linux-gnueabihf- SPL fits by 0x2a bytes
arm-none-eabi- SPL fits by 0xa bytes
(Those figures are from builds with the expanded SPL size allocation,
relative to the non-expanded SPL size limit; they're better by about
6 bytes in the more constrained build.)
Fixes: ba521994229c ("tegra124: Expand SPL space by 8KB")
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The new value is the most likely value where the kernel wants to end up
at run-time. Selecting this value as the load address likely avoids the
need to copy the kernel image from the actual load address to the desired
load address. Note that this isn't guaranteed since the kernel may wish
to run at an arbitrary location. In that case, U-Boot will still relocate
the image according to its wishes; this change is a performance
optimization, not a hard-coding of the final image location.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().
Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.
Signed-off-by: Alexandre Courbot <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
Based on Venice2, incorporates Stephen Warren's
latest P2571 pinmux table.
With Thierry Reding's 64-bit build fixes, this
will build and and boot in 64-bit on my P2571
(when used with a 32-bit AVP loader).
Signed-off-by: Tom Warren <[email protected]>
|
