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path: root/bsp/rm48x50/application/startup.c
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2022-01-05add RT_USING_POSIX_STDIOMeco Man
2021-11-24对finsh_set_device调用增加宏定义限制Meco Man
2021-04-09[bsp]update GPL license to Apache-2.0, and format filesyangjie
2020-11-23【优化】在代码中移除 rt_system_object_init/rt_system_tick_init ↵guozhanxin
的调用。
2013-10-20rm48x50: add GCC supportGrissiom
2013-10-19rm48x50: fix the prototype of finsh_system_initGrissiom
2013-06-12RM48 does not have cache implementedGrissiom
2013-05-29rm48x50: add finsh supportGrissiom
2013-05-24add rm48x50 bsp and libcpuGrissiom
We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.