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Enable RT_USING_HW_STACK_GUARD on Cortex-M4, which was previously only
available on Cortex-M7 and Cortex-M33.
Core porting (libcpu/arm/cortex-m4/):
- Add mpu.c/mpu.h/mputype.h aligned with the Cortex-M7 MPU layer. The only
difference is the default memory type attribute: Cortex-M4 has no L1 cache,
so the cacheability bits are reduced to three cases.
- Add rt_hw_stack_guard_init() to cpuport.c.
- Add missing #include <rtconfig.h> to context_gcc.S and invoke
rt_hw_mpu_table_switch() in the PendSV context switch path.
- Update SConscript to exclude mpu.c when memory protection is disabled.
BSP reference (bsp/stm32/stm32f407-fk407m2-zgt6/):
- board.h: include rtthread.h and define NUM_STATIC_REGIONS.
- board.c: define static_regions[] marking the Flash region read-only,
guarded by RT_USING_MEM_PROTECTION so it is not enabled by default.
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support independent interrupts management
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rt_hw_context_switch_to (#5748)
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当使用thumb指令集时，要求汇编语法中的“条件执行”要跟在IT指令后面，否则会编译不通过。
报错如下：Error: thumb conditional instruction should be in IT block -- `moveq r4,#0x01'
虽然可以通过指定"-Wa,-mimplicit-it=thumb"选项来告诉编译器识别隐式的IT指令，但是能在代码里面直接加上IT指令的话更好。
thumb指令集“条件执行”arm官网文档：
https://developer.arm.com/documentation/dui0473/m/condition-codes/conditional-execution-in-thumb-state
参考论坛帖子：
https://club.rt-thread.org/ask/question/433887.html
https://club.rt-thread.org/ask/question/4188.html
Signed-off-by: Mingrui Ren <[email protected]>
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1967 bbd45198-f89e-11dd-88c7-29a3b14d5316
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1901 bbd45198-f89e-11dd-88c7-29a3b14d5316
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1770 bbd45198-f89e-11dd-88c7-29a3b14d5316
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