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2026-09-15[libcpu][risc-v]Feat: Add OpenSBI SMP support to t-head c908guanxi.cgh
2026-01-12[risc-v][common64] Make rt_hw_cpu_shutdown weak to resolve multiple ↵Copilot
definition with RT_USING_DM (#11100) * Initial plan * [risc-v][common64] Make rt_hw_cpu_shutdown weak to fix multiple definition error Co-authored-by: BernardXiong <[email protected]> --------- Co-authored-by: copilot-swe-agent[bot] <[email protected]> Co-authored-by: BernardXiong <[email protected]>
2025-12-04[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscvTm-C-mT
1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng <[email protected]>
2025-02-22libcpu: riscv: fixed ARCH_RISCV_VECTOR issuekenneth.liu
description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui <[email protected]>
2024-09-13feat: remove redundant codes under virt64, c906Shell
Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell <[email protected]>