| Age | Commit message (Collapse) | Author |
|---|
|
Signed-off-by: Mengsk <[email protected]>
|
|
|
|
Signed-off-by: Mengsk <[email protected]>
|
|
|
|
dwc2 requires manually toggle Even/Odd bit manually for ISO IN transfer,
that's poses a problem when bInterval > 1 mainly for audio class, as the
moment the transfer is scheduled, we don't know when the host will issue
IN token (bInterval vs bRefresh schenanigans).
Linux driver use NAK interrupt to detect when the host is sending IN token
and toggle the Even/Odd bit accordingly based on the current frame number
and bInterval.
However on ST's stripped down DWC2 FS controller (e.g STM32F4, STM32F7),
NAK interrupt is not supported, even it's marked as always present in DWC2
databook. NAK interrupt is only supported on HS controller with external PHY.
Instead I schedule all ISO IN transfer for next frame, if the transfer failed,
incomplete isochronous IN transfer interrupt will be triggered and we can
relaunch the transfer.
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: Mengsk <[email protected]>
|
|
Signed-off-by: Mengsk <[email protected]>
|
|
Signed-off-by: Mengsk <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
- tusb_option.h: define OPT_MCU_ESP32H4
- tusb_mcu.h: enable DWC2 USBIP for H4
- dcd_dwc2.c: add H4 USB_WRAP field aliases (wrap_* → legacy names)
- dwc2_esp32.h: add H4 controller entry (FS base/IRQ, ep caps)
- family.c: include H4 in USB init/PHY setup
|
|
|
|
|
|
This code is written very carefully to always use an uncached view
of memory to read/write EDs. An uncached view must *always* be used,
or else cache behavior can corrupt the ED.
As part of this change, combine access into as few word-sized accesses
as possible. This makes the code perform better. Doing this involves
giving type names to the bitfields that make up the ED's data words.
|
|
ehci: fix device removal and endpoint open on next plug
|
|
|
|
The initial motivation for doing this is to remove the `used` flag
in the TD. If we use this flag, we end up being required to read from TDs
that the OHCI controller might be modifying (i.e. the OHCI controller
logically owns the TD). This happens when we try to allocate a
new, empty TD while the OHCI host controller is working on a transfer.
Move the `used` flag to `gtd_extra_data_t`. This data is only used
by the CPU, and the OHCI controller never accesses it.
The existing allocation method for TDs does *not* put an empty TD
onto each ED (i.e it does *not* do what is shown in Figure 5-6
of the OHCI specification). Instead, the NextTD field of the last
TD is set to 0. The TailP field of the ED is also set to 0.
This works in many cases. However, this implementation means that
the CPU may end up trying to write to the NextTD field of an
in-progress transfer while the OHCI host controller logically owns it.
Change the implementation to use an empty TD, as suggested by the
specification, for endpoints other than EP0. This avoids the
above issue. It is not necessary to make the change for EP0
because only at most one TD can ever be pending at a time.
The above change should also remove the need for the stall workaround.
In the future, we want to modify the code to access EDs through
an uncached mapping. Because uncached mappings are slow, we want to
access EDs as little as possible. Currently, when a TD completes,
we access an ED in order to figure out the device address and
endpoint number of the TD which was completed.
Because moving `used` to `gtd_extra_data_t` necessitates expanding it,
we have enough room to also store the device address and endpoint number
of the TD. This patch does so.
With the above two changes, we no longer need to access an ED when
a TD completes. Also remove the `index` field from TDs as it is
no longer necessary.
|
|
|
|
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
Signed-off-by: HiFiPhile <[email protected]>
|
|
|
|
|
|
This reverts commit 48f6b95bd8b0c3d33832f289b02b53da410d5ef9.
also revert gsnpsid shadown since it is already in the upstream
|
|
|
|
|
|
Clean up includes definitions
Remove wait that is not required
Remove redundant settings
Clean up clock configuration to look like other modules
Remove MSP_Init that is not required
Clean up driver code
dhcp: Fix DHCP_OFFER/DHCP_ACK destinaton.
In RFC 2131, the destination of DHCP OFFER/ACK is defined in Section 4.1.
Fix the destination error by following the rule of RFC 2131.
TODO: We implement all rule but the last one. ARP table is required to associate client's macaddr.
Currently, fallback to broadcast.
Signed-off-by: Elwin Huang <[email protected]>
Fix compile error.
Fix goto indentation
Co-authored-by: Copilot <[email protected]>
Fix osal_spin_unlock for mynewt
Mynewt version for osal_spin_unlock() called
OS_ENTER_CRITICAL instead of OS_EXIT_CRITICAL.
Signed-off-by: Jerzy Kasenberg <[email protected]>
Add ESP32-C5 and ESP32-C61 definitions
fix(dcd/dwc2): Fix reset procedure for versions >=4.20a
Fix STM32L4 GPIOD clock enable for variants without GPIOD
Add weact blackpill support
Add to boards.rst file
Fix file
Small cleanups.
Insert small delay for LowSpeed device
Improve retry operation at NAK response.
Remove dynamic memory allocation
use tusb_time_millis_api() instead of board_millis()
make loopdelay() always inline
update at32f405 dwc2 info and phy width selection
add at32f415 dwc2 info
add some consumer page configs
remove duplicated enum
Initial plan
Fix obsolete cnt assignment in _tu_fifo_peek() overflow check
Co-authored-by: hathach <[email protected]>
Initial plan
Update STM32 CMSIS dependencies to fix HSITRIM register bug
Co-authored-by: hathach <[email protected]>
Remove accidentally committed dependency directories
Co-authored-by: hathach <[email protected]>
Update all STM32 HAL driver dependencies to latest versions
Co-authored-by: hathach <[email protected]>
fix linker h745 issue with clang
fix linker h745 issue with clang
Update all STM32 CMSIS device dependencies to latest versions
Co-authored-by: hathach <[email protected]>
update pio-usb
Create comprehensive GitHub Copilot instructions and fix pre-commit configuration for TinyUSB (#3234)
* Initial plan
* Create comprehensive GitHub Copilot instructions for TinyUSB
Co-authored-by: hathach <[email protected]>
* Remove accidentally committed dependencies, use tools/get_deps.py instead
Co-authored-by: hathach <[email protected]>
* Fix .gitignore: ignore vendor/ directory not ceedling script
Co-authored-by: hathach <[email protected]>
* Revert .gitignore changes and add README_processed.rst
Co-authored-by: hathach <[email protected]>
* Remove README_processed.rst and revert ceedling file permissions
Co-authored-by: hathach <[email protected]>
* Changes before error encountered
Co-authored-by: hathach <[email protected]>
* Remove redundant manual validation step, keep only pre-commit and build validation
Co-authored-by: hathach <[email protected]>
* fix pre-commit
---------
Co-authored-by: copilot-swe-agent[bot] <[email protected]>
Co-authored-by: hathach <[email protected]>
modified the bsp files of at32 to make them work better
the family name error of at32 has been corrected
fix pre-commit
STM32N6570-DK board is added. Build with DEBUG=1 (make BOARD=stm32n6570dk DEBUG=1 all), otherwise it does not work for now. Tested with examples/device/cdc_dual_ports
|
|
[stm32] Wait until the PHYC PLL is stable
|
|
|
|
update at32f405 dwc2 info and phy width selection
|
|
|
|
Improve compatibility in CH32V20x USBFS Host
|
|
make loopdelay() always inline
|
|
|
|
|
|
|
|
|
|
|
|
|
|
driver can execute xfer_is()
|
|
support at32 mcu (2)
|
|
|
|
mcu/sdk instead
add cmake support for f403a_407 and f423
|
|
|
|
enable host example build for samd21/d51
|
|
|
