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-rw-r--r--board/phytec/phycore_am64x/Kconfig34
-rw-r--r--board/phytec/phycore_am64x/phycore-am64x.c18
2 files changed, 26 insertions, 26 deletions
diff --git a/board/phytec/phycore_am64x/Kconfig b/board/phytec/phycore_am64x/Kconfig
index a709b71ba4d..a4d25b84b96 100644
--- a/board/phytec/phycore_am64x/Kconfig
+++ b/board/phytec/phycore_am64x/Kconfig
@@ -12,7 +12,7 @@ config SYS_BOARD
default "phycore_am64x"
config SYS_VENDOR
- default "phytec"
+ default "phytec"
config SYS_CONFIG_NAME
default "phycore_am64x"
@@ -27,7 +27,7 @@ config SYS_BOARD
default "phycore_am64x"
config SYS_VENDOR
- default "phytec"
+ default "phytec"
config SYS_CONFIG_NAME
default "phycore_am64x"
@@ -37,26 +37,26 @@ source "board/phytec/common/Kconfig"
endif
config PHYCORE_AM64X_RAM_SIZE_FIX
- bool "Set phyCORE-AM64x RAM size fix instead of detecting"
- default false
- help
- RAM size is automatic being detected with the help of
- the EEPROM introspection data. Set RAM size to a fix value
- instead.
+ bool "Set phyCORE-AM64x RAM size fix instead of detecting"
+ default false
+ help
+ RAM size is automatic being detected with the help of
+ the EEPROM introspection data. Set RAM size to a fix value
+ instead.
choice
- prompt "phyCORE-AM64x RAM size"
- depends on PHYCORE_AM64X_RAM_SIZE_FIX
- default PHYCORE_AM64X_RAM_SIZE_2GB
+ prompt "phyCORE-AM64x RAM size"
+ depends on PHYCORE_AM64X_RAM_SIZE_FIX
+ default PHYCORE_AM64X_RAM_SIZE_2GB
config PHYCORE_AM64X_RAM_SIZE_1GB
- bool "1GB RAM"
- help
- Set RAM size fix to 1GB for phyCORE-AM64x.
+ bool "1GB RAM"
+ help
+ Set RAM size fix to 1GB for phyCORE-AM64x.
config PHYCORE_AM64X_RAM_SIZE_2GB
- bool "2GB RAM"
- help
- Set RAM size fix to 2GB for phyCORE-AM64x.
+ bool "2GB RAM"
+ help
+ Set RAM size fix to 2GB for phyCORE-AM64x.
endchoice
diff --git a/board/phytec/phycore_am64x/phycore-am64x.c b/board/phytec/phycore_am64x/phycore-am64x.c
index 114aa217023..5e077872152 100644
--- a/board/phytec/phycore_am64x/phycore-am64x.c
+++ b/board/phytec/phycore_am64x/phycore-am64x.c
@@ -66,7 +66,7 @@ int dram_init_banksize(void)
{
u8 ram_size;
- memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]) * CONFIG_NR_DRAM_BANKS);
+ memset(gd->dram, 0, sizeof(gd->dram[0]) * CONFIG_NR_DRAM_BANKS);
if (!IS_ENABLED(CONFIG_CPU_V7R))
return fdtdec_setup_memory_banksize();
@@ -74,21 +74,21 @@ int dram_init_banksize(void)
ram_size = phytec_get_am64_ddr_size_default();
switch (ram_size) {
case EEPROM_RAM_SIZE_1GB:
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
- gd->bd->bi_dram[0].size = 0x40000000;
+ gd->dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->dram[0].size = 0x40000000;
gd->ram_size = 0x40000000;
break;
case EEPROM_RAM_SIZE_2GB:
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
- gd->bd->bi_dram[0].size = 0x80000000;
+ gd->dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
break;
default:
/* Continue with default 2GB setup */
- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
- gd->bd->bi_dram[0].size = 0x80000000;
+ gd->dram[0].start = CFG_SYS_SDRAM_BASE;
+ gd->dram[0].size = 0x80000000;
gd->ram_size = 0x80000000;
printf("DDR size %d is not supported\n", ram_size);
}
@@ -109,8 +109,8 @@ int do_board_detect(void)
dram_init_banksize();
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
- start[bank] = gd->bd->bi_dram[bank].start;
- size[bank] = gd->bd->bi_dram[bank].size;
+ start[bank] = gd->dram[bank].start;
+ size[bank] = gd->dram[bank].size;
}
return fdt_fixup_memory_banks(fdt, start, size, CONFIG_NR_DRAM_BANKS);