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2026-03-23armv7: ls102xa: fix SPI flash clockMichael Walle
Commit bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") broke the SPI boot on the LS1021ATSN board (ls1021atsn_qspi_defconfig) at least. The commit message reads Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5 which means ClusterPLL/16 The original submitted patch had the following description: Value 0xC is reserved. Replace it with correct value 0x5 which is ClusterPLL/16 Unfortunatly, the little information which was there, was stripped even further. Why is 0x5 the "correct" value? In fact, it seems that the upper bit is just ignored and thus the value 0xC translates to 0x4 which is ClusterPLL/20. This, will result in a SPI clock of 60MHz (if the PLL is clocked at 1.2GHz). But even that is too much for the (default) 03h read opcode (max 50MHz). Set the value to ClusterPLL/24 which is 50MHz. Link: https://lore.kernel.org/r/[email protected]/ Fixes: bb6f3c0f7634 ("armv7: ls102xa: Update SCFG_QSPI_CLKSEL value") Signed-off-by: Michael Walle <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2024-05-06arm: fsl-layerscape: Remove <common.h> and add needed includesTom Rini
Remove <common.h> from all fsl-layerscape related files and when needed add missing include files directly. Acked-by: Peng Fan <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2023-12-21arm: Partial cleanup and audit usage of <config.h>Tom Rini
We need to include <config.h> directly when a file needs to have something such as CFG_SYS_SDRAM_SIZE referenced as this file is not automatically globally included and is most commonly indirectly included via common.h. Remove most cases of arm including config.h directly, but add it where needed. This includes a few board-specific fixes. Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-12-23global: Migrate CONFIG_MAX_MEM_MAPPED to CFGTom Rini
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini <[email protected]>
2022-12-22global: Remove unused CONFIG symbolsTom Rini
This removes the following unreferenced CONFIG symbols: CONFIG_FDTADDR CONFIG_FDTFILE CONFIG_FLASH_SECTOR_SIZE CONFIG_FSL_CPLD CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_I2C_MVTWSI CONFIG_I2C_RTC_ADDR CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE CONFIG_L1_INIT_RAM CONFIG_MACB_SEARCH_PHY CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MTD_NAND_VERIFY_WRITE CONFIG_MVGBE_PORTS CONFIG_NETDEV CONFIG_NUM_DSP_CPUS CONFIG_PHY_BASE_ADR CONFIG_PHY_INTERFACE_MODE CONFIG_PSRAM_SCFG CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE CONFIG_RD_LVL CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_SETUP_INITRD_TAG CONFIG_SH_QSPI_BASE CONFIG_SMDK5420 CONFIG_SOCRATES CONFIG_SPI_ADDR CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET CONFIG_TEGRA_SLINK_CTRLS CONFIG_TPM_TIS_BASE_ADDRESS CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM And also: BL1_SIZE PHY_NO RESERVE_BLOCK_SIZE Signed-off-by: Tom Rini <[email protected]>
2022-12-07net: tsec: Remove non-DM_ETH support codeTom Rini
As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini <[email protected]>
2022-12-05global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-12-05global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*Tom Rini
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-12-05global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*Tom Rini
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550 namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-11-10global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-08-12Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_MAX_NUM_OF_SEC Signed-off-by: Tom Rini <[email protected]>
2022-08-12Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et alTom Rini
This removes the following symbols: CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_QSPI_LE CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR CONFIG_SYS_FSL_SRDS_NUM_PLLS CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR CONFIG_SYS_GP2ODR CONFIG_SYS_HALT_BEFOR_RAM_JUMP CONFIG_SYS_HMI_BASE FSL_QSPI_FLASH_NUM FSL_QSPI_FLASH_SIZE Signed-off-by: Tom Rini <[email protected]>
2022-08-04Convert CONFIG_SYS_FSL_CCSR_GUR_BE et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_SCFG_BE CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_CCSR_GUR_LE CONFIG_SYS_FSL_CCSR_SCFG_LE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_IFC_LE CONFIG_SYS_FSL_PEX_LUT_LE Signed-off-by: Tom Rini <[email protected]>
2022-07-07layerscape: Remove some unused CONFIG symbolsTom Rini
All of these symbols are not referenced anywhere else in the code, so remove them. Cc: Peng Fan <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-07-05Convert CONFIG_SYS_FSL_SFP_BE et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_KEY_REVOCATION CONFIG_SYS_FSL_SFP_BE CONFIG_SYS_FSL_SFP_LE CONFIG_SYS_FSL_SFP_VER_3_0 CONFIG_SYS_FSL_SFP_VER_3_2 CONFIG_SYS_FSL_SFP_VER_3_4 CONFIG_SYS_FSL_SRK_LE This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for when CHAIN_OF_TRUST is enabled. Signed-off-by: Tom Rini <[email protected]>
2022-07-05Convert CONFIG_SYS_FSL_SEC_MON et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_SEC_MON CONFIG_SYS_FSL_SEC_MON_BE CONFIG_SYS_FSL_SEC_MON_LE Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_USB_MAX_CONTROLLER_COUNT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_USB_MAX_CONTROLLER_COUNT Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: ehci-fsl: Remove non-DM codeTom Rini
The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini <[email protected]>
2022-06-06ppc / layerscape: Clean up CONFIG_SYS_CCSR_DO_NOT_RELOCATE usageTom Rini
A number of PowerPC platforms define this, for SPL. To move this to Kconfig, it needs to be CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE, so use CONFIG_IS_ENABLED() to check for usage. A number of layerscape platforms bring this logic from PowerPC, but only need a small part of it, for the fman driver. Remove their unused portion at least. Signed-off-by: Tom Rini <[email protected]>
2022-03-28video: fsl: colibri_vf: Drop FSL DCU driverSimon Glass
This does not use driver model and is more than two years past the migration date. Drop it. It can be added back later if needed. Signed-off-by: Simon Glass <[email protected]>
2022-02-09Convert CONFIG_SCSI_AHCI_PLAT et al to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_SCSI_AHCI_PLAT CONFIG_SYS_SCSI_MAX_SCSI_ID CONFIG_SYS_SCSI_MAX_LUN CONFIG_SYS_SATA_MAX_DEVICE Drop CONFIG_SCSI for everything except the sandbox build. We only need one build for tests. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-09scsi: Drop CONFIG_SYS_SCSI_MAX_DEVICESimon Glass
This is defined based on two other CONFIGs for all boards except sandbox and durian. For sandbox the value does not matter. For durian the value seems excessive. Drop the option completely, to simplify configuration and reduce the number of things we need to convert to Kconfig. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2021-12-27Convert CONFIG_SYS_IMMR to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_IMMR We do this by consolidating the SYS_IMMR options we have and providing defaults. We also, in the few places where M68K was also sharing code with these platforms, define it within the file to CONFIG_SYS_MBAR to match usage. This should be cleaned up longer term. Signed-off-by: Tom Rini <[email protected]>
2021-02-08gpio: mpc8xxx_gpio: Fix for litte endianBiwen Li
Update gpio driver to use same logic for big-endian and little-endian Signed-off-by: Biwen Li <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2021-02-08pci: layerscape: Remove the shadow SVR definitionsHou Zhiqiang
This patch moves the SVR definitions to a new svr.h for Layerscape armv7 and armv8 platforms respectively, so that the PCIe driver can reuse them. Signed-off-by: Hou Zhiqiang <[email protected]> Reviewed-by: Wasim Khan <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2020-05-20Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Add DM_ETH support for lx2160aqds, ls2080aqds, ls1088aqds - QSI related fixes on ls1012a, ls2080a, ls1046a, ls1088a, ls1043a based platforms - Bug-fixes/updtaes related to ls1046afrwy, fsl-mc, msi-map property
2020-05-19treewide: Remove unused FSL QSPI config options for Layerscape platformsKuldeep Singh
Some of these options are not used by the driver anymore and some of them are obsolete as the information is gathered from the dt. Also consolidating defines in common headers. Signed-off-by: Frieder Schrempf <[email protected]> Signed-off-by: Ashish Kumar <[email protected]> Signed-off-by: Kuldeep Singh <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2020-05-18arm: Don't include common.h in header filesSimon Glass
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <[email protected]>
2019-11-27arm: drop eSDHC clock getting in mxc_get_clock() for layerscapeYangbo Lu
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms, eSDHC clock getting do not have to use it. It uses global data gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more than one eSDHC controllers on SoC, they use same reference clock. Signed-off-by: Yangbo Lu <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2019-10-21armv7: ls102xa: Update SCFG_QSPI_CLKSEL valueKuldeep Singh
Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5 which means ClusterPLL/16 Signed-off-by: Ashish Kumar <[email protected]> Signed-off-by: Kuldeep Singh <[email protected]> Signed-off-by: Priyanka Jain <[email protected]>
2019-03-15armv7: ls102xa: Add workaround for DDR erratum A-008850Alison Wang
Barrier transactions from CCI400 need to be disabled till the DDR is configured, otherwise it may lead to system hang. The patch adds workaround to fix the erratum. Signed-off-by: Shengzhou Liu <[email protected]> Signed-off-by: Alison Wang <[email protected]> Reviewed-by: Prabhakar Kushwaha <[email protected]>
2018-09-27armv7: ls102xa: Disable QE before enter deep sleepRan Wang
Otherwise system will hang after executing wfi. Signed-off-by: Ran Wang <[email protected]> Reviewed-by: York Sun <[email protected]>
2018-09-27armv7: fsl: remove sata supportPeng Ma
Remove the old implementation in order to enable DM for sata Signed-off-by: Peng Ma <[email protected]> Reviewed-by: York Sun <[email protected]>
2018-08-10armv8: layerscape: move ns_dev[] define from h to c file.Ran Wang
Move ns_dev[] from header file to C file to avoid compiling warning when header file is included by others. Signed-off-by: Ran Wang <[email protected]> [YS: rewrite commit message] Reviewed-by: York Sun <[email protected]>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <[email protected]>
2017-12-12ata: Migrate CONFIG_LIBATA to KconfigTuomas Tynkkynen
This symbol enables some library code used by various SATA drivers, so make this a non-user-visible symbol select'ed by the respective drivers, and let moveconfig handle the rest. Signed-off-by: Tuomas Tynkkynen <[email protected]>
2017-12-12ata: Migrate CONFIG_SCSI_AHCI to KconfigTuomas Tynkkynen
And use 'imply' liberally. Signed-off-by: Tuomas Tynkkynen <[email protected]>
2017-09-11armv7: Add workaround for USB erratum A-009007Ran Wang
Rx Compliance tests may fail intermittently at high jitter frequencies using default register values Program register USB_PHY_RX_OVRD_IN_HI in certain sequence to make the Rx compliance test pass. Signed-off-by: Sriram Dash <[email protected]> Signed-off-by: Rajesh Bhagat <[email protected]> Signed-off-by: Suresh Gupta <[email protected]> Signed-off-by: Ran Wang <[email protected]> [YS: Reordered Kconfig options] Reviewed-by: York Sun <[email protected]>
2017-09-11armv7: Add workaround for USB erratum A-008997Ran Wang
Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential Output Voltage Test Compliance fails using default transmitter settings Change config of transmitter signal swings by setting register PCSTXSWINGFULL to 0x47 to pass compliance tests. Signed-off-by: Sriram Dash <[email protected]> Signed-off-by: Rajesh Bhagat <[email protected]> Signed-off-by: Suresh Gupta <[email protected]> Signed-off-by: Ran Wang <[email protected]> [YS: Reordered Kconfig options] Reviewed-by: York Sun <[email protected]>
2017-09-11armv7: Add workaround for USB erratum A-009798Ran Wang
The default setting for USB High Speed Squelch Threshold results in a threshold close to or lower than 100mV. This leads to Receive Compliance test failure for a 100mV threshold. Shift the threshold from ~100mV towards ~130mV by setting SQRXTUNE to 0x0 to pass USB High Speed Receiver Sensitivity Compliance test. Signed-off-by: Sriram Dash <[email protected]> Signed-off-by: Rajesh Bhagat <[email protected]> Signed-off-by: Suresh Gupta <[email protected]> Signed-off-by: Ran Wang <[email protected]> [YS: Reordered Kconfig options] Reviewed-by: York Sun <[email protected]>
2017-09-11armv7: Add workaround for USB erratum A-009008Ran Wang
USB High Speed (HS) EYE Height Adjustment USB HS speed eye diagram fails with the default value at many corners, particularly at a high temperature Optimal eye at TXREFTUNE value to 0x9 is observed, change set the same value. Signed-off-by: Sriram Dash <[email protected]> Signed-off-by: Suresh Gupta <[email protected]> Signed-off-by: Ran Wang <[email protected]> [YS: Reordered Kconfig options] Reviewed-by: York Sun <[email protected]>
2017-09-11fsl-layerscape: Consolidate registers space defination for CCI-400 busAshish Kumar
CoreLink Cache Coherent Interconnect (CCI) provides full cache coherency between two clusters of multi-core CPUs and I/O coherency for devices and I/O masters. This patch add new config option SYS_FSL_HAS_CCI400 and moves existing register space definaton of CCI-400 bus to fsl_immap to be shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET in Kconfig. Signed-off-by: Ashish Kumar <[email protected]> Signed-off-by: Prabhakar Kushwaha <[email protected]> [YS: revised commit message, squashed patches for armv8 and armv7] Reviewed-by: York Sun <[email protected]>
2017-07-11Convert CONFIG_SCSI to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_SCSI Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass
We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <[email protected]>
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass
The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <[email protected]> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <[email protected]>
2017-04-17armv7: ls1021a: Drop macro CONFIG_LS102XAYork Sun
Use CONFIG_ARCH_LS1021A instead. Signed-off-by: York Sun <[email protected]>
2017-03-17serial: lpuart: restructure lpuart driverPeng Fan
Drop CONFIG_LPUART_32B_REG. Move the register structure to a common file include/fsl_lpuart.h Define lpuart_serial_platdata structure which includes the reg base and flags. For 32Bit register access, use lpuart_read32/lpuart_write32 which handles big/little endian. For 8Bit register access, still use the orignal code. Signed-off-by: Peng Fan <[email protected]> Reviewed-by : Stefano Babic <[email protected]> Cc: Bhuvanchandra DV <[email protected]> Cc: York Sun <[email protected]> Cc: Shaohui Xie <[email protected]> Cc: Alison Wang <[email protected]>
2017-01-28disk: convert CONFIG_DOS_PARTITION to KconfigPatrick Delaunay
Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrick Delaunay <[email protected]>
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