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Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Remove <common.h> from all mach-imx, CPU specific sub-directories and
include/asm/arch-mx* files and when needed add missing include files
directly.
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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With gcc-13.1 we get a warning about enum vs int here, so correct the
declaration to match the implementation.
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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The CSPI/ECSPI register bits do not differ between newer SoCs, instead
of having multiple copies of the same thing for each iMX SoC, define
the bits in the driver.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Stefano Babic <[email protected]>
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Some places use __ASSEMBLER__ instead which does not work since the
Makefile does not define it. Fix them.
Signed-off-by: Simon Glass <[email protected]>
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It is bad practice to include common.h in other header files since it can
bring in any number of superfluous definitions. It implies that some C
files don't include it and thus may be missing CONFIG options that are set
up by that file. The C files should include these themselves.
Update some header files in arch/arm to drop this.
Signed-off-by: Simon Glass <[email protected]>
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Add code to configure PLL4, from which the LDB clock are directly
derived.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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Add register definitions require for video configuration.
Signed-off-by: Nandor Han <[email protected]>
Signed-off-by: Martyn Welch <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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Add missing parts for i.MX53 PWM support
Acked-by: Nandor Han <[email protected]>
Signed-off-by: Martyn Welch <[email protected]>
Cc: Stefano Babic <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Lukasz Majewski <[email protected]>
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Some files for i.MX do not yet have the SPDX ID to reference the correct
license.
Signed-off-by: Stefano Babic <[email protected]>
Reviewed-by: Wolfgang Denk <[email protected]>
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Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/<SOC>.
This change is also coherent with the structure in kernel.
Signed-off-by: Stefano Babic <[email protected]>
CC: Fabio Estevam <[email protected]>
CC: Akshay Bhat <[email protected]>
CC: Ken Lin <[email protected]>
CC: Marek Vasut <[email protected]>
CC: Heiko Schocher <[email protected]>
CC: "Sébastien Szymanski" <[email protected]>
CC: Christian Gmeiner <[email protected]>
CC: Stefan Roese <[email protected]>
CC: Patrick Bruenn <[email protected]>
CC: Troy Kisky <[email protected]>
CC: Nikita Kiryanov <[email protected]>
CC: Otavio Salvador <[email protected]>
CC: "Eric Bénard" <[email protected]>
CC: Jagan Teki <[email protected]>
CC: Ye Li <[email protected]>
CC: Peng Fan <[email protected]>
CC: Adrian Alonso <[email protected]>
CC: Alison Wang <[email protected]>
CC: Tim Harvey <[email protected]>
CC: Martin Donnelly <[email protected]>
CC: Marcin Niestroj <[email protected]>
CC: Lukasz Majewski <[email protected]>
CC: Adam Ford <[email protected]>
CC: "Albert ARIBAUD (3ADEV)" <[email protected]>
CC: Boris Brezillon <[email protected]>
CC: Soeren Moch <[email protected]>
CC: Richard Hu <[email protected]>
CC: Wig Cheng <[email protected]>
CC: Vanessa Maegima <[email protected]>
CC: Max Krummenacher <[email protected]>
CC: Stefan Agner <[email protected]>
CC: Markus Niebel <[email protected]>
CC: Breno Lima <[email protected]>
CC: Francesco Montefoschi <[email protected]>
CC: Jaehoon Chung <[email protected]>
CC: Scott Wood <[email protected]>
CC: Joe Hershberger <[email protected]>
CC: Anatolij Gustschin <[email protected]>
CC: Simon Glass <[email protected]>
CC: "Andrew F. Davis" <[email protected]>
CC: "Łukasz Majewski" <[email protected]>
CC: Patrice Chotard <[email protected]>
CC: Nobuhiro Iwamatsu <[email protected]>
CC: Hans de Goede <[email protected]>
CC: Masahiro Yamada <[email protected]>
CC: Stephen Warren <[email protected]>
CC: Andre Przywara <[email protected]>
CC: "Álvaro Fernández Rojas" <[email protected]>
CC: York Sun <[email protected]>
CC: Xiaoliang Yang <[email protected]>
CC: Chen-Yu Tsai <[email protected]>
CC: George McCollister <[email protected]>
CC: Sven Ebenfeld <[email protected]>
CC: Filip Brozovic <[email protected]>
CC: Petr Kulhavy <[email protected]>
CC: Eric Nelson <[email protected]>
CC: Bai Ping <[email protected]>
CC: Anson Huang <[email protected]>
CC: Sanchayan Maity <[email protected]>
CC: Lokesh Vutla <[email protected]>
CC: Patrick Delaunay <[email protected]>
CC: Gary Bisson <[email protected]>
CC: Alexander Graf <[email protected]>
CC: [email protected]
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all
cases we are mirroring the values used by the Linux Kernel here. Also,
so long as (and in this case, it is true) we implement flushes in hunks
that are no larger than the smallest implementation (and given that we
mirror the Linux Kernel, again we are fine) it is OK to align higher.
The biggest changes here are that we always use 64 bytes for CPU_V7 even
if for example the underlying core is only 32 bytes (this mirrors
Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the
Linux Kernel) as we do not need multi-platform support (to this degree)
and only the Cavium ThunderX 88xx series has a use for such large
alignment.
Cc: Albert Aribaud <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Prafulla Wadaskar <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Nagendra T S <[email protected]>
Cc: Vaibhav Hiremath <[email protected]>
Acked-by: Lokesh Vutla <[email protected]>
Cc: Steve Rae <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Stefan Agner <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Cc: Mateusz Kulikowski <[email protected]>
Cc: Peter Griffin <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
Acked-by: "Pali Rohár" <[email protected]>
Cc: Adam Ford <[email protected]>
Cc: Steve Sakoman <[email protected]>
Cc: Grazvydas Ignotas <[email protected]>
Cc: Nishanth Menon <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Robert Baldyga <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Thomas Weber <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: David Feng <[email protected]>
Cc: Alison Wang <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: York Sun <[email protected]>
Cc: Shengzhou Liu <[email protected]>
Cc: Mingkai Hu <[email protected]>
Cc: Prabhakar Kushwaha <[email protected]>
Cc: Aneesh Bansal <[email protected]>
Cc: Saksham Jain <[email protected]>
Cc: Qianyu Gong <[email protected]>
Cc: Wang Dongsheng <[email protected]>
Cc: Alex Porosanu <[email protected]>
Cc: Hongbo Zhang <[email protected]>
Cc: tang yuantian <[email protected]>
Cc: Rajesh Bhagat <[email protected]>
Cc: Josh Wu <[email protected]>
Cc: Bo Shen <[email protected]>
Cc: Viresh Kumar <[email protected]>
Cc: Hannes Schmelzer <[email protected]>
Cc: Thomas Chou <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Sam Protsenko <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Christophe Ricard <[email protected]>
Cc: Anand Moon <[email protected]>
Cc: Beniamino Galvani <[email protected]>
Cc: Carlo Caione <[email protected]>
Cc: huang lin <[email protected]>
Cc: Sjoerd Simons <[email protected]>
Cc: Xu Ziyuan <[email protected]>
Cc: "[email protected]" <[email protected]>
Cc: "Ariel D'Alessandro" <[email protected]>
Cc: Kever Yang <[email protected]>
Cc: Samuel Egli <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Hans de Goede <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Siarhei Siamashka <[email protected]>
Cc: Boris Brezillon <[email protected]>
Cc: Andre Przywara <[email protected]>
Cc: Bernhard Nortmann <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Ben Whitten <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Alexander Graf <[email protected]>
Cc: Sekhar Nori <[email protected]>
Cc: Vitaly Andrianov <[email protected]>
Cc: "Andrew F. Davis" <[email protected]>
Cc: Murali Karicheri <[email protected]>
Cc: Carlos Hernandez <[email protected]>
Cc: Ladislav Michl <[email protected]>
Cc: Ash Charles <[email protected]>
Cc: Mugunthan V N <[email protected]>
Cc: Daniel Allred <[email protected]>
Cc: Gong Qianyu <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Masahiro Yamada <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Tested-by: Stephen Warren <[email protected]>
Acked-by: Paul Kocialkowski <[email protected]>
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Move common chip revision id's to main cpu header file
mx25 generic include cpu header for chip revision
Signed-off-by: Adrian Alonso <[email protected]>
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Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.
This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Reviewed-by: Stefano Babic <[email protected]>
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This commit adds ethernet support to the TS4800. Note that the
MAC address is not fused on this board and have to be read from
FEC PALR PAUR registers (this is how the kernel provided by
Technologic Systems does it).
signed-off-by: Damien Riegel <[email protected]>
Cc: Stefano Babic <[email protected]>
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mx5 is a cortex-a8 which has 64 byte cache lines. i'll need this for
adding gadget support to usbarmory, but it's a property common the the
entire SoC family - may as well make it available to all MX5 boards
Works on usbarmory; compile-tested on mx53loco and mx51_efikamx too
Signed-off-by: Chris Kuethe <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Matthew Starr <[email protected]>
Cc: Andrej Rosano <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Chris Kuethe <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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commit d9f43c8f5c1d7ed27c99a06be85a4bb64b2c73fb sets
get_reset_cause() as static, but this conflicts with mx5
where its prototype is in sys_proto.h.
Drop it from sys_proto.h and drop print_cpuinfo from mx53_loco,
factorizing the call for this board.
Signed-off-by: Stefano Babic <[email protected]>
CC: Jason Liu <[email protected]>
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Move MX5 specific set_chipselect_size function into generic i.MX part,
such that MX6 based boards are able to use this function as well.
While doing this the iomuxc gpr member needed to be consolidated between
MX5 and MX6.
Signed-off-by: Fabio Estevam <[email protected]>
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Fix the name of the CCM CHSCCDR register.
Signed-off-by: Marek Vasut <[email protected]>
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arch/arm/include/asm/spl.h requires all SoCs to have
arch/arm/include/asm/arch-*/spl.h.
But many of them just define BOOT_DEVICE_* macros.
Those macros are used in the "switch (boot_device) { ... }"
statement in common/spl/spl.c.
So they should not be archtecture specific, but be described as
a simpile enumeration.
This commit merges most of arch/arm/include/asm/arch-*/spl.h
into arch/arm/include/asm/spl.h.
With a little more effort, arch-zynq/spl.h and arch-socfpga/spl.h
will be merged, while I am not sure about OMAP and Exynos.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Andreas Bießmann <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Tom Warren <[email protected]>
CC: Stefano Babic <[email protected]>
CC: Minkyu Kang <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Acked-by: Andreas Bießmann <[email protected]>
Acked-by: Michal Simek <[email protected]>
Acked-by: Stefano Babic <[email protected]>
Acked-by: Stephen Warren <[email protected]>
Acked-by: Tim Harvey <[email protected]>
Tested-by: Bo Shen <[email protected]> [on sama5d3xek board for at91 part]
Acked-by: Stephen Warren <[email protected]>
Tested-by: Stefano Babic <[email protected]> [applying Tim's i.MX6 patches]
Acked-by: Tom Rini <[email protected]>
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Provide define for the SCLK_CTL field of the config reg of ECSPI.
While at it, oder the defines to improve readability and make
adding more defines easier.
Signed-off-by: Markus Niebel <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.
Signed-off-by: Fabio Estevam <[email protected]>
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Enable fuse supply before fuse programming and disable after.
Signed-off-by: Sergey Alyoshin <[email protected]>
Reviewed-by: Benoît Thébaudeau <[email protected]>
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The 'enable' argument can be better expressed as boolean.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Otavio Salvador <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Allow usage of the imx-common/iomux-v3.h framework by including pad settings for
the i.MX53. The content of the file is taken from Freescale's Linux kernel at
commit 4ab3715, plus the required changes to make it work in U-Boot.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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Add missing definitions that are required by future changes.
By the way, make some cosmetic cleanup.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename
MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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Augment the MX5 clock code with function to enable and configure
NFC clock. This is necessary to get NFC working on MX5.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Benoît Thébaudeau <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
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Fix minor adjustments needed to get SPL framework building on MX5.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Benoît Thébaudeau <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Tom Rini <[email protected]>
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PUE requires PKE to mean something, as do pull values with PUE, so do not
compell users to explicitly use PKE and PUE everywhere. This is also what is
done on Linux and what has already been done for i.MX51.
By the way, remove some unused pad control definitions.
There is no change of behavior.
Note that SPI_PAD_CTRL was defined by several boards with a pull value, but
without PKE or PUE, which means that no pull was actually enabled in the pad.
This might be a bug in those boards, but this patch does not change the
behavior, so it just removes the meaningless pull value from those definitions.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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Commit dc88403 "iomux-v3: Place pad control definitions into common file" broke
mx51_efikamx because it made i.MX6's pad control definitions conflict with
i.MX51's.
i.MX51's pad control definitions are actually common to some other i.MX
(25/35/53), so move them to the common iomux-v3.h (just like what is done in
Linux's), and select the correct definitions depending on whether CONFIG_MX6 is
defined or not.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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Define the UID (SoC unique ID) fuses, and the fuses available for the user.
Signed-off-by: Benoît Thébaudeau <[email protected]>
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IIM:
- Homogenize prg_p naming (the reference manuals are not always self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks on i.MX53.
OCOTP:
- Rename iim to ocotp in order to avoid confusion.
- Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the
reference manual.
- Merge the existing spinoff gp1 fuse definition on i.MX6.
- Fix the number of banks on i.MX6.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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imx-regs.h is more appropriate location for containing register masks.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).
Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.
Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.
Signed-off-by: Fabio Estevam <[email protected]>
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Use a common watchdog driver for all these cpus.
Signed-off-by: Troy Kisky <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Align SPI chip select naming with i.MX53 reference manual.
Signed-off-by: Fabio Estevam <[email protected]>
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Read memory setup registers to determine size
of available ram. This routine works for mx53/mx6x
I need this because when mx6solo called get_ram_size
with a too large maximum size, the system hanged.
Signed-off-by: Troy Kisky <[email protected]>
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Previously, the same value was returned for both mx6dl and mx6solo.
Check number of processors to differeniate.
Also, a freescale patch says that sololite has its cpu/rev
stored at 0x280 instead of 0x260.
I don't have a sololite to verify.
Signed-off-by: Troy Kisky <[email protected]>
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Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz.
Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz
instead.
Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI
at 1080p because the IPU clock cannot reach the requested frequency.
Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its
maximum frequency.
Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little
bit to allow easier comparison with the original clock setup from FSL U-boot.
Signed-off-by: Fabio Estevam <[email protected]>
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The i.MX5 eSDHC clocks were considered as coming from the IPG clock although
they have dedicated clock paths.
Also, on i.MX5/6, each SDHC instance has a dedicated clock, so gd->sdhc_clk must
be set accordingly. This is good for the case only a single SDHC instance is
used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix
the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Eric Bénard <[email protected]>
Cc: Otavio Salvador <[email protected]>
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If CCM.CCSR.lp_apm is set, the lp_apm clock is not necessarily 32768 Hz x 1024.
In that case:
- on i.MX51, this clock comes from the output of the FPM,
- on i.MX53, this clock comes from the output of PLL4.
This patch fixes the code accordingly.
Signed-off-by: Benoît Thébaudeau <[email protected]>
Cc: Stefano Babic <[email protected]>
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