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The XSPI SET GMID command is used to assign GMID ownership to the
requester, allowing access to protected XSPI control registers. This API
must be called in SPL if XSPI GMID-protected settings need to be
modified. Otherwise, XSPI configuration depends on the previous GMID
owner to provide the correct settings.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Add CPU type definition and detection macro for i.MX952 SoC.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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System Manager(SM) has implemented the MISC protocol to retrieve DDR
information. Using this API, U-Boot can obtain the DDR size dynamically
instead of relying on static configuration macros.
This change addresses the DDR ECC enabled case, where 1/8 of the total
DDR size is reserved for ECC data. The scmi_misc_ddrinfo() returns the
DDR size with EEC overhead already deducted.
Implementation details:
- Query the DDR size via scmi_misc_ddrinfo()
- Replace direct REG_DDR_CS[0,1]_BNDS register reads with SCMI call
- Switch from PHYS_SDRAM[x]_SIZE macros to runtime detection
- For backward compatibility with older SM firmware, fall back to
static PHYS_SDRAM[x]_SIZE configuration if the SCMI call fails
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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On GDET enabled part, need to call voltage change start and finish
APIs when adjust the voltage more than 100mv. Otherwise GDET will be
triggered and system is reset
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Introduce support for the new i.MX94 processor, including its CPU type
and SoC-level Kconfig entry.
The i.MX94 is a new member of the i.MX9 family. It uses a System Manager
to handle system-level functions such as power, clock, sensor and pin
control. The System Manager runs on a Cortex-M processor, while the
Cortex-A processor communicates with it via the ARM SCMI protocol and a
messaging unit.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Jacky Bai <[email protected]>
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Since i.MX94, the ELE get_info structure is updated to add
OEM PQC SRK hash, so update it.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Jacky Bai <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Peng Fan <[email protected]>
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This patch adds i.MX95 SoC and clock related code. Because they are
based on SCMI, put them in the scmi subfolder.
Signed-off-by: Alice Guo <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Ji Luo <[email protected]>
Signed-off-by: Jindong Yue <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ranjani Vaidyanathan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
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iMX91 is reduced part from iMX93 with part number: i.MX9131/11/01
It removed A55_1, M33, MIPI DSI, LVDS, etc.
i.MX9131:
- Support 2.4GT/s DDR and HWFFC at 1.2GT/s
i.MX9121:
- A55 at 800Mhz and DDR at 1600MTS, with low drive mode.
i.MX9111:
- Support 1.6GT/s DDR and HWFFC at 800MT/s
i.MX9101:
- Support 800Mhz ARM clock
- Support 1.6GT/s DDR and HWFFC at 800MT/s
- No parallel display, eQOS, flexcan
Updated Clock/Container/CPU and etc for i.MX91
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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The decision on whether HAB is enabled is solely based on the SEC_CONFIG
fuse. The HAB FIELD_RETURN feature is able to permanently disable HAB on
a CPU, after which it is able to boot unsigned firmware. U-Boot however
does not take into account the FIELD_RETURN mode, and refuses to boot
unsigned software when the feature is enabled.
Also take the FIELD_RETURN fuse into account when deciding whether HAB
is enabled. When The FIELD_RETURN fuse is blown, HAB is not enabled.
Tested on i.MX8M Mini, i.MX8M Plus, i.MX8M Nano and i.MX6ULL
Signed-off-by: Paul Geurts <[email protected]>
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The imx_sec_config_fuse_t structure is not specific to the sec_config
fuse, but can be used for all fuse words.
Rename the structure to a more generic name to be reused for other
fuses.
Signed-off-by: Paul Geurts <[email protected]>
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Add ELE APIs to support read and write shadow fuses
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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i.MX8M and i.MX9 have duplicated fixup_thermal_trips, so move it
to arch/arm/mach-imx/fdt.c to avoid duplicated code.
The critial temperature point for i.MX9 set to "maxc - 5" back to give
some margin.
Signed-off-by: Peng Fan <[email protected]>
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Add support for iMX93 low performance parts 9302 and 9301 which
restrict to low drive voltage only.
The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU
and A55 core1 (9301) disabled.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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disable_cpu_nodes could be reused by i.MX9, so move disable_cpu_nodes
out from mach-imx/imx8m/soc.c to mach-imx/fdt.c and update
disable_cpu_nodes to make it easy to support different socs.
Signed-off-by: Peng Fan <[email protected]>
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Add a new ahab_derive command that derives the hardware unique key (HUK)
into a 16 or 32 bytes key and stores it at the given address.
Signed-off-by: Mathieu Othacehe <[email protected]>
Reviewed-by: Ye Li <[email protected]>
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Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.
This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.
Reported-by: Jonas Karlman <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Remove <common.h> from this board vendor directory and when needed
add missing include files directly.
Acked-by: Jason Liu <[email protected]>
Acked-by: Peng Fan <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This message is used to commit into the fuses any new SRK revocation and
FW version information that have been found into the NXP (ELE FW) and
OEM containers.
Signed-off-by: Mathieu Othacehe <[email protected]>
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Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.
This is a functional change, one which likely should have been in place
from the start, but a functional change nonetheless. Previously, all
non-IMX8 images (except FITs without FIT_FULL) would be optimized out if
the only image load method enabled supported IMX8 images. With this change,
support for other image types now has an effect.
There are seven boards with SPL_LOAD_IMX_CONTAINER enabled: three with
SPL_BOOTROM_SUPPORT:
imx93_11x11_evk_ld imx93_11x11_evk imx8ulp_evk
and four with SPL_MMC:
deneb imx8qxp_mek giedi imx8qm_mek
All of these boards also have SPL_RAW_IMAGE_SUPPORT and
SPL_LEGACY_IMAGE_FORMAT enabled as well. However, none have FIT support
enabled. Of the six load methods affected by this patch, only SPL_MMC and
SPL_BOOTROM_SUPPORT are enabled with SPL_LOAD_IMX_CONTAINER.
spl_romapi_load_image_seekable does not support legacy or raw images, so
there is no growth. However, mmc_load_image_raw_sector does support loading
legacy/raw images. Since these images could not have been booted before, I
have disabled support for legacy/raw images on these four boards. This
reduces bloat from around 800 bytes to around 200.
There are no in-tree boards with SPL_LOAD_IMX_CONTAINER and AHAB_BOOT both
enabled, so we do not need to worry about potentially falling back to
legacy images in a secure boot scenario.
Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.
Signed-off-by: Sean Anderson <[email protected]>
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Add a function to abstract the common task of validating i.MX8 container
image headers.
Signed-off-by: Sean Anderson <[email protected]>
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Abstract common interfaces for AHAB authentication operations.
Then share some common codes for AHAB and SPL container authentication
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
M4 image to any DDR address first. Then use the
"bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
or CM4_1, the default core id is 0 for CM4_0.
Since current M4 only supports running in TCM. The bootaux will copy
the M4 image from DDR to its TCML.
2. Implment bootaux for HIFI on QXP
command: bootaux 0x81000000 1
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.
Signed-off-by: Clement Faure <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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- Add crc computation.
- Add ele_generate_dek_blob API for encrypted boot support.
Signed-off-by: Clement Faure <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog
Signed-off-by: Peng Fan <[email protected]>
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Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.
Signed-off-by: Peng Fan <[email protected]>
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According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.
Signed-off-by: Peng Fan <[email protected]>
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Get and print boot stage through ROM API in SPL
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Remove legacy command definitions, change to use new ELE_xxx command
request.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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For ahab_status command, support to get and decode AHAB events
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Add get_events API to retrieve any singular events that has occurred
since the FW has started from sentinel
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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From Sentinel FW v0.0.9-9df0f503, the response message of get info API
is changed to add OEM SRK and some states (IMEM, CSAL, TRNG).
With old structure, we get failure from sentinel due to the buffer
size can't fit with new response message. So update the API structure
to fix the issue.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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This converts 6 usages of this option to the non-SPL form, since there is
no SPL_IMX_MODULE_FUSE defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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Commit 56c2dbdabab5 ("imx: bootaux: cleanup code") introduces the
following LTO related warning:
"
arch/arm/mach-imx/imx_bootaux.c:24:31: warning: type of ‘hostmap’ does not match original declaration [-Wlto-type-mismatch]
24 | const __weak struct rproc_att hostmap[] = { };
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: array types have different bounds
1590 | const struct rproc_att hostmap[] = {
| ^
arch/arm/mach-imx/imx8m/soc.c:1590:24: note: ‘hostmap’ was previously declared here
../aarch64-linux-gnu/bin/ld: warning: u-boot has a LOAD segment with RWX permissions
"
This is because the weak empty array of structures "hostmap" is eventually
replaced by non-empty array of structures with different number of elements.
Fix this by avoiding weak variable size array, instead use a weak function
which returns single pointer to the array.
Fixes: 56c2dbdabab5 ("imx: bootaux: cleanup code")
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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It is used as delay for gpmi write strobe.
Signed-off-by: Michael Trimarchi <[email protected]>
Reviewed-by: Dario Binacchi <[email protected]>
Signed-off-by: Dario Binacchi <[email protected]>
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Use more generic name for S40x msg structure
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Introduce Sentinel API ahab_release_m33_trout to make sure sentinel
release M33 trout and make sure M33 could boot.
Signed-off-by: Peng Fan <[email protected]>
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Add new API to get sentinel FW status and SoC chip info
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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To support more RDC instances on i.MX93, update API to latest
definition.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400
MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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i.MX9 shares same ROM API with i.MX8ULP, so make the i.MX8ULP the function
prototype common and usable by i.MX9.
Also include mmc env functions that use ROM API.
Signed-off-by: Peng Fan <[email protected]>
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Add i.MX9 Kconfig and basic files for the new SoC
Signed-off-by: Peng Fan <[email protected]>
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Add USB2_BOOT type for i.MX8ULP and i.MX9
Signed-off-by: Peng Fan <[email protected]>
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Most i.MX implements get_boot_device, move it to common header to
simplify code
Signed-off-by: Peng Fan <[email protected]>
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For SoCs support ROM API, CONFIG_SPL_BOOTROM_SUPPORT is needed,
so use this macro to guard the code to avoid extend the list.
And drop the guard with structure definition, there is no need.
Signed-off-by: Peng Fan <[email protected]>
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The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.
Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.
[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
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This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Rasmus Villemoes <[email protected]>
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Add i.MX8MP UltraLite Part CPU type
Signed-off-by: Peng Fan <[email protected]>
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