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path: root/arch/riscv/cpu/fu540/cache.c
AgeCommit message (Collapse)Author
2021-09-07board: sifive: use ccache driver instead of helper functionZong Li
Invokes the common cache_init function to initialize ccache. Signed-off-by: Zong Li <[email protected]> Reviewed-by: Sean Anderson <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2020-08-25riscv: fu540: Use correct API to get L2 cache controller base addressBin Meng
At present fdtdec_get_addr() is used to get L2 cache controller base address. This only works for a fixed #address-cells and #size-cells. Change to use fdtdec_get_addr_size_auto_parent() instead. Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]>
2020-08-14riscv: sifive: fu540: redundant initializationHeinrich Schuchardt
We should not initialize a variable if the value is overwritten before being read. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Pragnesh Patel <[email protected]> Tested-by: Pragnesh Patel <[email protected]> Reviewed-by: Rick Chen <[email protected]>
2020-07-03riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel
Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]> Tested-by: Bin Meng <[email protected]>