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2025-08-31phy: rockchip: naneng-combphy: Simplify init opsJonas Karlman
The init ops for Rockchip COMBPHY driver is more complex than it needs to be, e.g. declaring multiple init functions that only differ in the error message. Simplify the init ops based on code from the Linux mainline driver. This change also ensure that errors returned from combphy_cfg() and reset_deassert_bulk() is propertly propagated to the caller. No other runtime change is expected with this simplication. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-31phy: rockchip: naneng-combphy: Fix Generic PHY reference countingJonas Karlman
Generic PHY reference counting helps ensure driver ops for init/exit and power on/off are called at correct state. For this to work the PHY driver must initialize PHY-id to a persistent value in of_xlate ops. The Rockchip COMBPHY driver does not initialize the PHY-id field, this typically lead to use of unshared reference counting among different struct phy instances. Initialize the PHY-id in of_xlate ops to ensure use of shared reference counting among all struct phy instances. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-31phy: rockchip: usbdp: Simplify init opsJonas Karlman
With working shared reference counting for Generic PHY ops there is no need for the Rockchip USBDP PHY driver to keep its own status (reference counting) handling. Simplify the init ops now that shared reference counting is working. This also removes the unused mode_change handling as part of the simplication. No runtime change is expected with this simplication. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-31phy: rockchip: usbdp: Fix Generic PHY reference countingJonas Karlman
Generic PHY reference counting helps ensure driver ops for init/exit and power on/off are called at correct state. For this to work the PHY driver must initialize PHY-id to a persistent value in of_xlate ops. The Rockchip USBDP PHY driver does not initialize the PHY-id field, this typically lead to use of unshared reference counting among different struct phy instances. Initialize the PHY-id in of_xlate ops to ensure use of shared reference counting among all struct phy instances. E.g. on a ROCK 5B following could be observed: => usb start starting USB... [...] Bus usb@fc400000: 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb reset resetting USB... [...] rockchip_udphy phy@fed90000: cmn ana lcpll lock timeout rockchip_udphy phy@fed90000: failed to init usbdp combophy rockchip_udphy phy@fed90000: PHY: Failed to init phy@fed90000: -110. Can't init PHY1 Bus usb@fc400000: probe failed, error -110 scanning usb for storage devices... 0 Storage Device(s) found With shared reference counting this is fixed: => usb reset resetting USB... [...] Bus usb@fc400000: 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30mmc: rockchip_sdhci: Do not test unsigned for being less than 0Andrew Goodbody
In rockchip_sdhci_execute_tuning the variable tuning_loop_counter is tested for being less than 0. Ensure that it is a signed type by declaring it as s8 instead of char. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30power: rk8xx: allow to customize RK806 reset modeQuentin Schulz
The RK806 PMIC has a bitfield for configuring the restart/reset behavior (which I assume Rockchip calls "function") whenever the PMIC is reset either programmatically (c.f. DEV_RST in the datasheet) or via PWRCTRL or RESETB pins. For RK806, the following values are possible for RST_FUN: 0b00 means "Restart PMU" 0b01 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode" 0b10 means "Reset all the power off reset registers, forcing the state to switch to ACTIVE mode, and simultaneously pull down the RESETB PIN for 5mS before releasing" 0b11 means the same as for 0b10 just above. This adds the appropriate logic in the driver to parse the new rockchip,reset-mode DT property to pass this information. It just happens that the values in the binding match the values to write in the bitfield so no mapping is necessary. For backward compatibility reasons, if the property is missing we set it to 0b10 (i.e. BIT(7)) like before this commit was merged instead of leaving it untouched like in the kernel driver. Note that this does nothing useful for U-Boot at the moment as the ways to reset the device (e.g. via `reset` command) doesn't interact with the RK8xx PMIC and simply does a CPU reset. Considering the upstream Linux kernel left this register untouched until (assumed) v6.17[1], this is useful for cases in which the U-Boot bootloader has this patch (and running with a DT with rockchip,reset-mode property set) and running an upstream kernel before (assumed) v6.17, or alternatively later without the property in the kernel DT. [1] https://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git/commit/?id=87b48d86b77686013f5c2a8866ed299312b671db Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30phy: rockchip: naneng-combphy: Add support for RK3528Jianwei Zheng
Add support for the PCIe/USB3 combo PHY used in the RK3528 SoC. Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. Signed-off-by: Jianwei Zheng <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30usb: dwc3-generic: Use combined glue and ctrl node for RK3528Jonas Karlman
Like Rockchip RK3328, RK3568 and RK3588, the RK3528 also have a single node to represent the glue and ctrl for USB 3.0. Use rk_ops as driver data to select correct ctrl node for RK3528 DWC3. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30rockchip: clk: clk_rk3528: Add dummy CLK_REF_PCIE_INNER_PHY supportJonas Karlman
Add dummy support for the CLK_REF_PCIE_INNER_PHY clock to allow probe of the phy-rockchip-naneng-combphy driver on RK3528. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30phy: rockchip: naneng-combphy: Add support for RK3576Jon Lin
Add support for the PCIe/USB3/SATA combo PHYs used in the RK3576 SoC. Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. Signed-off-by: Jon Lin <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY supportJonas Karlman
Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the phy-rockchip-naneng-combphy driver on RK3576. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30phy: rockchip: usbdp: Add support for RK3576Frank Wang
Add support for the USB3.0+DP PHY used in the RK3576 SoC. Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. Signed-off-by: Frank Wang <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30phy: rockchip-inno-usb2: Add support for RK3576Frank Wang
Add support for the USB2.0 PHYs used in the RK3576 SoC. Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. Signed-off-by: Frank Wang <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30usb: dwc3-generic: Use combined glue and ctrl node for RK3576Jonas Karlman
Like Rockchip RK3328, RK3568 and RK3588, the RK3576 also have a single node to represent the glue and ctrl for USB 3.0. Use rk_ops as driver data to select correct ctrl node for RK3576 DWC3. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30rockchip: Add default USB_GADGET_PRODUCT_NUM for RK3576Jonas Karlman
Use 0x350e as the default USB Product ID for Rockchip RK3576, same PID being used by the BootROM when the device is in MASKROM mode. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30rng: rockchip_rng: Add compatible for RK3576Jonas Karlman
The RK3576 SoC contains a RKRNG block that can be used to generate random numbers using the rockchip_rng driver. Add compatible for RK3576 to support random numbers: => rng list RNG #0 - rng@2a410000 => rng 00000000: 36 dd ab 98 ec fb fe d1 cf 36 b3 e1 9b 3d 00 90 6........6...=.. 00000010: f5 84 de 75 6b 27 48 9e 13 62 12 6c 50 ca 47 1a ...uk'H..b.lP.G. 00000020: b3 4d fc 43 c5 b5 2d be 07 27 03 26 bb 69 61 2a .M.C..-..'.&.ia* 00000030: 6f 70 01 83 4e ce 91 7a 5a 6c 7c 00 43 87 3e c5 op..N..zZl|.C.>. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30usb: gadget: rockchip: Fix spacing around the Kconfig optionTom Rini
This Kconfig option used spaces and not tabs for indentation. Switch to tabs. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30usb: gadget: rockchip: Add missing dependencyTom Rini
The rockchip usb gadget driver cannot build without platform specific headers being available. Express that requirement in Kconfig as well. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-30rockchip: rockchip-inno-usb2: Fix Synchronous Abort on usb startAlex Shumsky
Fix NULL pointer dereference that happen when rockchip-inno-usb2 clock enabled before device probe. This early clock enable call happen in process of parent clock activation added in ac30d90f3367. Fixes: 229218373c22 ("phy: rockchip-inno-usb2: Add support for clkout_ctl_phy"). Fixes: ac30d90f3367 ("clk: Ensure the parent clocks are enabled while reparenting") Co-authored-by: Jonas Karlman <[email protected]> Signed-off-by: Alex Shumsky <[email protected]> Reviewed-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2025-08-29power: regulator: tps65941: Cannot test unsigned for being negativeAndrew Goodbody
In tps65941_buck_val and tps65941_ldo_val hex is an unsigned variable being assigned the return value from a function that returns int. Change hex to be an int so that the following test for an error as a negative value will work as expected. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2025-08-29power: regulator: rzg2l-usbphy: Add parenthesis to return expressionAndrew Goodbody
In order to get the expected result from rzg2l_usbphy_regulator_get_enable the return expression needs parenthesis so that the binary and is performed before the double logical not. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2025-08-29power: regulator: palmas: Cannot test unsigned for being negativeAndrew Goodbody
In palmas_smps_val and palmas_ldo_val hex is an unsigned variable being assigned the return value from a function that returns int. Change hex to be an int so that the following test for an error as a negative value will work as expected. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2025-08-29power: regulator: lp87565: Cannot test unsigned for being negativeAndrew Goodbody
In lp87565_buck_val hex is an unsigned variable being assigned the return value from a function that returns int. Change hex to be an int so that the following test for an error as a negative value will work as expected. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2025-08-29power: regulator: lp873x: Cannot test unsigned for being negativeAndrew Goodbody
In lp873x_buck_val and lp873x_ldo_val hex is an unsigned variable being assigned the return value from a function that returns int. Change hex to be an int so that the following test for an error as a negative value will work as expected. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Frieder Schrempf <[email protected]>
2025-08-29power: power_i2c: ret is uninitialised if not DM_I2CAndrew Goodbody
In pmic_reg_read ret is only assigned to inside #if CONFIG_IS_ENABLED(DM_I2C) so move the test and return ret inside as well and also guard the declaration of ret with CONFIG_IS_ENABLED(DM_I2C) to prevent a warning about an unused variable. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-08-29power: axp: Remove redundant codeAndrew Goodbody
In axp_init after checking the chip ID there is an else clause that returns ret. ret is guaranteed to be 0 at this point as the code would have returned above if not. The next statement is a return 0 so the return ret is redundant, remove it. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2025-08-29usb: cdns3: Do not access memory after freeAndrew Goodbody
The call to cdns3_gadget_ep_free_request will free priv_req so do the call to list_del_init which accesses the memory pointed to by priv_req before the free. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Siddharth Vadapalli <[email protected]>
2025-08-28Merge tag 'xilinx-for-v2026.01-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next AMD/Xilinx/FPGA changes for v2026.01-rc1 mbv: - Add it to CI loop versal2: - Wire UFS driver serial: - Add support for OF_PLATDATA in uartlite misc: - Mark some structures as const
2025-08-27Merge tag 'fsl-qoriq-next-2025-08-27' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/27490 - Various patches from Andrew to address issues found by Smatch - Reinitialize job ring in crypto fsl rng - Set scaler values for fsl dspi CS-SCK and SCK-CS
2025-08-27drivers: crypto: fsl: rng: Reinitialize job ringAnthony Pighin (Nokia)
u-boot internals were being corrupted following an EFI callback to get_rng(). One of the many footprints was a corruption of the EFI protocols linked list. A request for >16 bytes of random data is broken into smaller requests. Those requests are fed in a loop to the CAAM RNG, which uses a job queue ring for interaction. However, the job queue descriptor is created only at probe time. That descriptor may end up needing an endian swap (LS1046A) before being fed to the CAAM RNG. This corrupts the descriptor for the next iteration, since it will be blindly endian swapped yet again. Two issues arise. The number of words to endian swap is taken from the input descriptor itself. So on the second iteration, the length has been corrupted. This results in a corruption past the end of the descriptor: whatever is after in memory is endian swapped too. Second, some of the entries in the descriptor are DMA addresses. If the descriptor is still somehow considered valid after swapping, the data at the corrupted DMA address is now trampled. Linux properly initializes the descriptor for each iteration. This is what is now done with this commit. Signed-off-by: Anthony Pighin <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27fsl_dspi: set scaler values for CS-SCK and SCK-CS delaysTomas Alvarez Vanoli
These values were calculated but not set. They are required for the calculation of the delays, as stated in the "QorIQ LS1043A Reference Manual, Rev. 6, 07/2020" page 2172. The delays are calculated as (1/freq)*PCSSCK*CSSCK and (1/freq)*PASC*ASC. Signed-off-by: Tomas Alvarez Vanoli <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27serial: lpuart: Return value from correct variableAndrew Goodbody
In get_lpuart_clk_rate if the call to clk_get_rate returns an error then the call to return should pass the value of the error which is in rate rather than ret which will be 0 as its value is not affected by this error. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27drivers: qe: avoid double free()Andrew Goodbody
Avoid calling free(addr) twice if the device for ucode is not found. This patch repeats a similar fix but that only applied to code without CONFIG_TFABOOT enabled. This patch applies to the code with CONFIG_TFABOOT enabled. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fsl-mc: Incorrect variable used in error pathAndrew Goodbody
In mc_fixup_dpc_mac_addr noff is assigned the return value from fdt_add_subnode so that is the variable that should be passed to fdt_strerror and returned when negative. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fsl-mc: NULL check dflt_dpni before dereferenceAndrew Goodbody
In dpni_exit there is a NULL check for dflt_dpni after it is dereferenced a number of times. Instead move the NULL check to early in the function. Also assign NULL to dflt_dpni after free in both dpni_init and dpni_exit. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fsl-mc: NULL check dflt_dpbp before dereferenceAndrew Goodbody
In dpbp_exit there is a NULL check for dflt_dpbp after it is dereferenced a number of times. Instead move the NULL check to early in the function. Also assign NULL to dflt_dpbp after free in both dpbp_init and dpbp_exit. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fsl-mc: NULL check dflt_dpio before dereferenceAndrew Goodbody
In dpio_exit there is a NULL check for dflt_dpio but it happens after dpio_dflt has been dereferenced a number of times already. Instead move the NULL check to first thing in the function. Also assign NULL to dflt_dpio after free in both dpio_init and dpio_exit. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fsl_enetc: Fix copy/paste errorAndrew Goodbody
In netc_blk_ctrl_probe the test for failure of the function clk_prepare_enable should not return PTR_ERR(ipg_clk) as it does not check IS_ERR(ipg_clk) instead it should return err as that is what is holding the error code in this case. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fm: Correct test for timeoutAndrew Goodbody
In memac_wait_until_free and memac_wait_until_done the use of post-decrement on the test in the while loop for a timeout means that timeout will be equal to -1 on exit in that case. Adjust the test for this expected value. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fm: NULL check dev before dereferenceAndrew Goodbody
In fm_eth_bind there is a dereference of dev before it is NULL checked. Add a NULL check before the first dereference and remove a later NULL check that is now redundant. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27net: fm: Correct test for timeoutAndrew Goodbody
In bmi_rx_port_disable and bmi_tx_port_disable the use of post-decrement on the test in the while loop for a timeout means that timeout will be equal to -1 on exit in that case. Adjust the test for this expected value. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-27ddr: fsl: Provide initial value for zqcs_initAndrew Goodbody
In the case of !zq_en zqcs_init is never assigned to although its value is used. Correct by initialising zqcs_init to 0. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-08-26misc: fs_loader: Add request_firmware_into_buf_via_script() for flexible ↵Lucien.Jheng
firmware loading via U-Boot script This commit introduces a new API, request_firmware_into_buf_via_script(), to the fs_loader framework. This function allows firmware to be loaded into memory using a user-defined U-Boot script, providing greater flexibility for firmware loading scenarios that cannot be handled by static file paths or device/partition selection alone. Key features: - The API runs a specified U-Boot script (by name), which is responsible for loading the firmware into memory by any means (e.g., load from MMC, USB, network, etc.). - The script must set two environment variables: 'fw_addr' (the memory address where the firmware is loaded) and 'fw_size' (the size of the firmware in bytes). - The function validates these variables, copies the firmware into a newly allocated buffer (using memdup), and returns the pointer via the provided double pointer argument. - The maximum allowed firmware size is checked to prevent buffer overflows. - The environment variables are cleared after use to avoid stale data. - Detailed error messages are provided for all failure conditions to aid debugging. Usage example: 1. Define a U-Boot script in the environment that loads the firmware and sets the required variables: => env set my_fw_script 'load mmc 0:1 ${loadaddr} firmware.bin && env set fw_addr ${loadaddr} && env set fw_size ${filesize}' 2. In your code, call the new API: void *fw_buf = NULL; int ret = request_firmware_into_buf_via_script(&fw_buf, 0x46000000, "my_fw_script"); if (ret < 0) return ret; This approach allows board integrators and users to customize the firmware loading process without modifying the source code, simply by changing the script in the U-Boot environment. Signed-off-by: Lucien.Jheng <[email protected]> Reviewed-by: Marek Vasut <[email protected]> [trini: Fix printf of size_t needing to use %zx] Signed-off-by: Tom Rini <[email protected]>
2025-08-26Merge tag 'tpm-next-25082025' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-tpm into next CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/27461 Tom removed an unused TPM driver and fixed a few prints to include the 'z' prefix for size_t declaratiuons. Andrew fixed an unsigned int comparision against < 0 in the tpm infineon driver.
2025-08-26Merge tag 'u-boot-stm32-20250825' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/27466 - Enable OF_UPSTREAM_BUILD_VENDOR for stm32mp25_defconfig - Fix to avoid inifite loop in stm32_sdmmc2 driver - Populate oobavail field of nand_ecclayout in stm32_fmc2_nand driver
2025-08-26Merge tag 'u-boot-at91-fixes-2025.10-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 First set of u-boot-at91 fixes for the 2025.10 cycle: This set includes smatch fixes for clocks and mmc and one QSPI fix.
2025-08-26ufs: amd-versal2: Configure RMMI and M-PHY registers for HS modeVenkatesh Yadav Abbarapu
Configure RMMI and M-PHY registers for HS mode required for selection of bit rate series A or B. If it is not a calibrated part, then switch back to SLOWAUTO_MODE and skip all these configurations. Implemented below sequence as per the DWC RMMI databook. 1. Override RMMI CBRATESEL with the desired rate. 2. Set TX_CFGUPDT_0 to 1'b1 for one TX_CFGCLK_0 cycle. 3. Override PHY rx_req to 1, then poll on PHY rx_ack register till it goes 1(both lanes). 4. Override PHY rx_req to 0, then poll on PHY rx_ack register till it goes 0(both lanes). 5. Remove PHY rx_req override(both lanes). 6. Start the LS PMC. Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2025-08-26dm: core: Mark root_info as constMichal Simek
root_info driver structure is not changing that's why mark them as const which ensure that structure will be moved from .data section to .rodata section. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/18d92a93a9863ed0452e82a1f8e0ff9205adb4f9.1753444878.git.michal.simek@amd.com
2025-08-26mailbox: zynqmp-ipi: Mark zynqmp_ipi_dest_mbox_ops as constMichal Simek
Operations are not changing that's why mark them as const which ensure that structure will be moved from .data section to .rodata section. Also mark them as static because they are not used out of this file. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/b7e5dc8841f6e904a7365f2ed45248609c007ddd.1753444878.git.michal.simek@amd.com
2025-08-26clk: zynqmp: Mark zynqmp_clk_ops as constMichal Simek
Operations are not changing that's why mark them as const which ensure that structure will be moved from .data section to .rodata section. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/92eb9e90189d8b96246966633478662076da7185.1753444878.git.michal.simek@amd.com