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2025-08-15timer: fttmr010_timer: Remove unused driverTom Rini
This driver is unused. Remove it. Signed-off-by: Tom Rini <[email protected]>
2025-08-15net: ti: icssg: Remove impossible testAndrew Goodbody
port_id is an unsigned variable so cannot be negative. Remove the test checking for port_id being less than 0. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-15net: ti: am65-cpsw-nuss: Initialise retAndrew Goodbody
In am65_cpsw_phy_init it is not certain that ret will be assigned to before it reaches the 'return ret' statement. Initialise ret to ensure that ret is valid. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-15net: phy: cortina: Ensure memory allocated is freedAndrew Goodbody
In cs4340_upload_firmware a buffer is allocated with malloc but this is never freed. The pointer to this buffer, addr, is not even kept unchanged. But in some cases addr is not a buffer allocated by malloc. Introduce the use of another pointer to keep track of the buffer and to know if it needs to be freed. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-14ram: Tighten some ram driver dependenciesTom Rini
A few ram drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14serial: linflexuart: Remove unused driverTom Rini
This driver is unused. Remove it. Signed-off-by: Tom Rini <[email protected]>
2025-08-14serial: Tighten some serial driver dependenciesTom Rini
A few serial drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14rtc: pl031: Correct function type of pl031_write_regTom Rini
When calling writel we do not have a return value to check or pass along. This function should therefore be void and not return what writel gives us. Signed-off-by: Tom Rini <[email protected]>
2025-08-14rtc: mc146818: Fix building on more architecturesTom Rini
This driver makes calls to in8/out8(). On PowerPC these are separate and real calls but elsewhere they are able to simply be wrappers to inb/outb. Rework this logic to be able to build this driver on more platforms. Signed-off-by: Tom Rini <[email protected]>
2025-08-14rtc: Tighten some rtc driver dependenciesTom Rini
The Marvell RTC rtc driver cannot build without access to some platform specific header files. Express that requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14sysreset: Tighten some sysreset driver dependenciesTom Rini
The MPC83xx sysreset driver cannot build without access to some architecture specific header files. Express that requirements in Kconfig as well. Reviewed-by: Peter Robinson <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-08-14sound: Tighten some sound driver dependenciesTom Rini
A few sound drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Reviewed-by: Peter Robinson <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-08-14soc: Tighten some soc driver dependenciesTom Rini
The Qualcomm Snapdragon "SoC" driver cannot build without access to some ARM64 specific functionality. Express that requirements in Kconfig as well. Reviewed-by: Casey Connolly <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-08-14remoteproc: Tighten some remoteproc driver dependenciesTom Rini
The TI IPU remoteproc driver cannot build without access to some platform specific header files. Express that requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14reset: Tighten some reset driver dependenciesTom Rini
A few reset drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14pwm: pwm-aspeed: Add missing <linux/log2.h> to pwm-aspeed.cTom Rini
This driver references the logarithmic macros while relying on an indirection inclusion of <linux/log2.h>. Add the missing include directly. Signed-off-by: Tom Rini <[email protected]>
2025-08-14pwm: Tighten some pwm driver dependenciesTom Rini
A few pwm drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14pinctrl: Tighten some pinctrl driver dependenciesTom Rini
A few pinctrl drivers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-14sm: Rework the Kconfig logic hereTom Rini
The symbol "SM" is a library symbol and should not be prompted for. It should be selected by the drivers that use it. In this case we need to add a SANDBOX_SM symbol for the sandbox driver. The meson SM driver cannot build on other platforms, so add the appropriate dependency. Reviewed-by: Peter Robinson <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2025-08-14net: e1000: Free temporary buffer on exitAndrew Goodbody
In do_e1000_spi_checksum a temporary buffer is allocated but never freed. Add code to free on exit. Also refactor the code to make the exit code common. This issue found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-14misc: add PolarFire SoC system controllerJamie Gibbons
This driver provides an interface to access the functions of the system controller on the Microchip PolarFire SoC. This driver includes functions to use the system controller to read the device serial number. Signed-off-by: Jamie Gibbons <[email protected]> Acked-by: Leo Yu-Chi Liang <[email protected]>
2025-08-14mailbox: add PolarFire SoC mailbox driverJamie Gibbons
This driver adds support for the single mailbox channel of the MSS system controller on the Microchip PolarFire SoC. Signed-off-by: Jamie Gibbons <[email protected]> Acked-by: Leo Yu-Chi Liang <[email protected]>
2025-08-13Merge tag 'qcom-fixes-13Aug2025' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/27364 Quite a few Smatch issues reported by Andrew, and the LMB allocation fix.
2025-08-13pinctrl: qcom: sdm845: Limit check off by 1Andrew Goodbody
The driver specifies 154 pins so should have a maximum selector of 153 to ensure that the index into the array special_pins_names does not overflow. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13pinctrl: qcom: sa8775: Limit check for array index not correctAndrew Goodbody
In sa8775p_get_pin_name the limit check for the index into msm_special_pins_data allows for more elements than exist. Add code to ensure the array index remains in bounds. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13button: qcom-pmic: Fix dereference of uninitialised pointerAndrew Goodbody
The pointer 'label' is declared and later dereferenced without ever having a value assigned to it. Add an assignment to this pointer so it will be valid later when dereferenced. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Casey Connolly <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13serial: msm-geni: No need to NULL check privAndrew Goodbody
The NULL check for priv in qcom_geni_serial_poll_bit serves no useful prupose as too much other code surrounding it relies on priv being valid. Remove the NULL check for priv and other related code. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13serial: msm-geni: Detect error from get_clk_div_rateAndrew Goodbody
In msm_serial_setbrg if the call to get_clk_div_rate fails then there will not have been an assignment to clk_div which will lead to the call to geni_serial_baud using an uninitialised value. Check for an error from get_clk_div_rate and return an error code if so. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Casey Connolly <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13phy: qcom: Fix ret is uninitialisedAndrew Goodbody
In qcom_snps_eusb2_phy_probe after the call to devm_clk_get if an error is found then ret is printed but has not been assigned to by the code. Decode the error from the pointer and assign it to ret. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Sumit Garg <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Casey Connolly <[email protected]>
2025-08-13mmc: gen_atmel_mci: NULL check variable before useAndrew Goodbody
In mci_send_cmd the pointer 'data' is optional so guard its use with a NULL check to prevent any attempt to dereference it when not provided. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2025-08-13mmc: gen_atmel_mci: Remove duplicate checksAndrew Goodbody
Remove duplicate checks on status from mci_data_read and mci_data_write which are guaranteed to be true as exiting the above do..while loop above requires that to be so. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2025-08-13mfd: atmel-smc: Ensure match is initialisedAndrew Goodbody
If the test in the for loop is never matched then the variable 'match' will never be assigned to. Provide an initial value so this cannot be a problem. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-13clk: at91: Fix use of unsigned loop indexAndrew Goodbody
The use of the unsigned variable 'i' as a loop index leads to the test for i being non-negative always being true. Instead declare 'i' as an int so that the for loop will terminate as expected. If the original for loop completes 'i' will be 1 past the end of the array so decrement it in the subsequent error path to prevent an out of bounds access occurring. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-13clk: at91: Fix testing of unsigned variable to be negativeAndrew Goodbody
The variable 'index' is declared as unsigned but used to receive the return value of a function returning 'int'. This value is then tested for being less than zero to detect an error condition but as index is unsigned this can never be true. Change the variable 'index' to be an int so that the error condition can be detected. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]>
2025-08-13spi: atmel_qspi: fix race condition in transfer completion checkRamin Moussavi
In atmel_qspi_transfer(), the status register is polled with: imr = QSPI_SR_INSTRE | QSPI_SR_CSR; return readl_poll_timeout(aq->regs + QSPI_SR, sr, (sr & imr) == imr, ATMEL_QSPI_TIMEOUT); However, this is racy: QSPI_SR_INSTRE can be set before QSPI_SR_CSR, and will then be cleared by the read. If that happens, the condition "(sr & imr) == imr" can never be true, and the function times out. This race condition is avoided in at91bootstrap by accumulating the status bits across reads until both bits have been observed: /* Poll INSTruction End and Chip Select Rise flags. */ imr = (QSPI_SR_INSTRE | QSPI_SR_CSR); sr = 0; do { udelay(1); sr |= qspi_readl(qspi, QSPI_SR) & imr; } while ((--timeout) && (sr != imr)); Update U-Boot's atmel_qspi_transfer() to use the same pattern, ensuring that both flags are observed even if they are not set simultaneously. Signed-off-by: Ramin Moussavi <[email protected]> [[email protected]: remove 'sr' and fix commit msg] Signed-off-by: Eugen Hristev <[email protected]>
2025-08-12pinctrl: sunxi: a523: change Ethernet pin function nameAndre Przywara
The name of the pin function was changed last minute in the DT, from emac0 to gmac0. Adjust the name we use in the pinctrl driver accordingly. Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Jernej Skrabec <[email protected]>
2025-08-11pinctrl: sx150x: reformat and fixup Copyright headerNeil Armstrong
The Linux pinctrl-sx150 was originally written as a GPIO driver and fully rewritten by me as a Pinctrl driver and extended by other contributors. Fixup the Copyright header style and correctly report the Copyright headers from the Linux driver. Signed-off-by: Neil Armstrong <[email protected]>
2025-08-11pinctrl: gpio: sx150x: fix compilation warnings.Chali Anis
Fixes: 5451504256d3 ("pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver") Signed-off-by: Chali Anis <[email protected]>
2025-08-11gpio: dwapb_gpio: Using wrong function to free memoryAndrew Goodbody
In gpio_dwapb_bind plat is used to reference memory allocated by devm_kcalloc but it is attempted to be freed using kfree. Instead free this memory using the correct devm_kfree function. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Acked-by: Quentin Schulz <[email protected]>
2025-08-11clk: cdce9xx: Fix use of dev_read_u32_defaultAndrew Goodbody
The function dev_read_u32_default does not return an error and the variable 'val' is unsigned so testing for >= 0 will always be true. It looks like the code was attempting to return -1 if xtal-load-pf was not present but that cannot work. Instead use dev_read_u32 which returns an error code separately from writing the value into the passed pointer. This issue was found by Smatch. Signed-off-by: Andrew Goodbody <[email protected]> Fixes: 260777fc2333 ("clk: cdce9xx: add support for cdce9xx clock synthesizer") Acked-by: Quentin Schulz <[email protected]>
2025-08-11sandbox: Add more dummy functions to mimic other architecturesTom Rini
This adds more common functions found on other architectures that will allow for more compile-testing of drivers. These are either dummy functions as we do not need them or mappings to existing functions, similar to how other architectures handle it. Signed-off-by: Tom Rini <[email protected]>
2025-08-11nvme: Tighten requirements on NVME_APPLE driverTom Rini
This driver requires Apple rtkit headers in order to build. Express that requirement in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-11pci: Tighten some PCI controller dependenciesTom Rini
A large number of PCI controllers cannot build without access to some platform specific header files. Express those requirements in Kconfig as well. Signed-off-by: Tom Rini <[email protected]>
2025-08-11pci: Add missing <linux/sizes.h> to pcie_iproc.cTom Rini
This driver references the SZ_ macros while relying on an indirection inclusion of <linux/sizes.h>. Add the missing include directly. Signed-off-by: Tom Rini <[email protected]>
2025-08-08Merge tag 'u-boot-socfpga-next-20250808' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-socfpga This pull request introduces initial U-Boot support for Agilex7 M-series, along with several enhancements and cleanups across existing Agilex platforms. Key changes include new board support, DDR driver additions, updated device trees, and broader SoCFPGA SPL improvements. Highlights: - Agilex7 M-series bring-up: - Basic DT support and board initialization for Agilex7 M-series SoC and SoCDK. - New sdram_agilex7m DDR driver with UIBSSM mailbox support and HBM support. - Clock driver support for Agilex7 M-series. - New defconfig: socfpga_agilex7m_defconfig. - Agilex and Agilex5 enhancements: - Improved SPL support: ASYNC interrupt enabling, system manager init refactor, and cold scratch register usage. - Updated firewall probing and watchdog support in SPL. - Cleaned up DDR code, added secure region support for ATF, and improved warm reset handling. - Device Tree and config updates: - Migration to upstream Linux DT layout for Agilex platforms. - Consolidated socfpga_agilex_defconfig and removed deprecated configs. - Platform-specific environment variables for Distro Boot added. - Driver fixes and cleanups: - dwc_eth_xgmac and clk-agilex cleanup and improvements. - Several coverity and style fixes. Contributions in this PR are from Alif Zakuan Yuslaimi, Tingting Meng, and Andrew Goodbody. This patch set has been tested on Agilex 5 devkit, Agilex devkit and Agilex7m devkit. Passing all pipeline tests at SoCFPGA U-boot custodian https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27318
2025-08-08Merge tag 'u-boot-imx-master-20250808' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27314 - Several Smatch reported fixes. - Enable the temperature command on imx8ulp-evk. - Fix mx8mm_fracpll_tbl. - Make optee packaging optional for imx8m. - Reuse and export low_drive_freq_update() on imx9. - Enable USB OTG ID pin pull up in SPL on dh-imx6.
2025-08-08ddr: altera: soc64: Fix dram size calculation in clamshell modeTingting Meng
Fix wrong memory size calculation in clamshell mode Signed-off-by: Tingting Meng <[email protected]> Signed-off-by: Alif Zakuan Yuslaimi <[email protected]> Reviewed-by: Tien Fong Chee <[email protected]>
2025-08-08ddr: altera: soc64: Clean up bit-shift by zero bitTingting Meng
Clean up bit-shift by zero bit Signed-off-by: Tingting Meng <[email protected]> Signed-off-by: Alif Zakuan Yuslaimi <[email protected]> Reviewed-by: Tien Fong Chee <[email protected]>
2025-08-08ddr: altera: Add DDR driver for Agilex7 M-seriesTingting Meng
This is for new platform enablement for Agilex7 M-series. Add DDR driver for Agilex7 M-series. This driver is designed to support DDR and HBM memory. The official HBM handoff is not ready yet, therefore hardcoded handoff is used for HBM driver validation on mUDV board. Signed-off-by: Tingting Meng <[email protected]> Signed-off-by: Alif Zakuan Yuslaimi <[email protected]> Reviewed-by: Tien Fong Chee <[email protected]>
2025-08-08ddr: altera: Add uibssm mailbox support for Agilex7 M-series with HBMTingting Meng
Add uibssm mailbox driver for Agilex7 M-series. HPS will interact with UIB and HBM subsystem through software defined mailbox interface. HPS can retrieve HBM memory interface calibration status, UIB configuration, memory interfae configuration, trigger calibration and etc with the list of supported mailbox command type and opcode. Signed-off-by: Tingting Meng <[email protected]> Signed-off-by: Alif Zakuan Yuslaimi <[email protected]> Reviewed-by: Tien Fong Chee <[email protected]>