| Age | Commit message (Collapse) | Author |
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Enable RT_USING_HW_STACK_GUARD on Cortex-M4, which was previously only
available on Cortex-M7 and Cortex-M33.
Core porting (libcpu/arm/cortex-m4/):
- Add mpu.c/mpu.h/mputype.h aligned with the Cortex-M7 MPU layer. The only
difference is the default memory type attribute: Cortex-M4 has no L1 cache,
so the cacheability bits are reduced to three cases.
- Add rt_hw_stack_guard_init() to cpuport.c.
- Add missing #include <rtconfig.h> to context_gcc.S and invoke
rt_hw_mpu_table_switch() in the PendSV context switch path.
- Update SConscript to exclude mpu.c when memory protection is disabled.
BSP reference (bsp/stm32/stm32f407-fk407m2-zgt6/):
- board.h: include rtthread.h and define NUM_STATIC_REGIONS.
- board.c: define static_regions[] marking the Flash region read-only,
guarded by RT_USING_MEM_PROTECTION so it is not enabled by default.
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IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外,将判断条件改为列表方式,这样更方便后续增加其他可能的IAR编译链
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将GCC判断条件改为列表方式,方便后续增加新的编译工具链
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* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
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This reverts commit a5f6fdc780d55f2bf2a1624815879e15c51082b5.
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